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DS90UB949A-Q1EVM: SerDes Bring up issue.

Part Number: DS90UB949A-Q1EVM
Other Parts Discussed in Thread: DS90UB949-Q1EVM, ALP, USB2ANY

Tool/software:

Hello,

I'm using a screen display which incorporates a DS90UB948 deser. It is connected to a DS90UB949-Q1EVM and a successful FPD-LINK is established then using ALP software but there is no connection between deserialiser ?

Deser. I2C Address = 0x58 

Serializer board all default settings done.

please guide the all necessary step to estabilish the connection between deser. 

also share all required script and needfull settings in ALP software and serializer board.

Regards,
Abhishek Sonar
Tata Motors

  • Hi Abhishek,

    Can you send screenshots of ALP and register dumps of the UB949 so I can have more insight into your configuration?

    Successful FPD-Link bring up will require the HDMI video source to correctly interpret the EDID and send over the correct video resolution. Are you programming the EDID on startup or using the default internal EDID?

    What MODE_SELs did you set on the UB949?

    Best,

    Jack

  • Hello Jack,

    We have kept the settings in default mode as per the EVM user guide, and the EDID is set to the default internal mode.

    Please review the register dump for the UB949. The MODE_SEL setting is 0, which is also in its default state.

    Register Display - ALP Nano 1 - DS90UB949, Connector 1

    Register  Data  Name
    0x0000  0x18  I2C Device ID
    0x0001  0x00  Reset
    0x0003  0xDA  General Configuration
    0x0004  0x80  Mode Select
    0x0005  0x00  I2C Master Config
    0x0006  0x00  DES ID
    0x0007  0x58  SlaveID[0]
    0x0008  0x00  SlaveAlias[0]
    0x0009  0x00  Reserved
    0x000A  0x00  Back Channel CRC Errors
    0x000B  0x00  Back Channel CRC Errors
    0x000C  0x00  General Status
    0x000D  0x20  GPIO[0] Config
    0x000E  0x00  GPIO[1] and GPIO[2] Config
    0x000F  0x00  GPIO[3] Config
    0x0010  0x00  GPIO[5] and GPIO[6] Config
    0x0011  0x00  GPIO[7] and GPIO[8] Config
    0x0012  0x00  Datapath Control
    0x0013  0x88  General Purpose Control
    0x0014  0x00  BIST and DOPL Control
    0x0015  0x01  I2C_VSELECT
    0x0016  0xFE  BCC Watchdog Control
    0x0017  0x1E  I2C Control
    0x0018  0x7F  SCL High Time
    0x0019  0x7F  SCL Low Time
    0x001A  0x01  Datapath Control 2
    0x001B  0x00  BIST BC Error Count
    0x001C  0x00  GPI Pin Status 1
    0x001D  0x00  GPI Pin Status 2
    0x001E  0x05  TX_PORT_SEL
    0x001F  0xFF  Frequency Counter
    0x0020  0x00  Deserializer Capabilities 1
    0x0021  0x00  Deserializer Capabilities 2
    0x0022  0x25  Reserved
    0x0023  0x00  Reserved
    0x0024  0x00  Reserved
    0x0025  0x00  Reserved
    0x0026  0x00  Link Detect Control
    0x0027  0x00  Reserved
    0x0028  0x01  Reserved
    0x0029  0x20  Reserved
    0x002A  0x20  Reserved
    0x002B  0xA0  Reserved
    0x002C  0x00  Reserved
    0x0030  0x00  SCLK_CTRL
    0x0031  0x00  AUDIO_CTS0
    0x0032  0x00  AUDIO_CTS1
    0x0033  0x00  AUDIO_CTS2
    0x0034  0x00  AUDIO_N0
    0x0035  0x00  AUDIO_N1
    0x0036  0x00  AUDIO_N2_COEFF
    0x0037  0x00  CLK_CLEAN_STS
    0x0038  0x00  Reserved
    0x0039  0x00  Reserved
    0x003A  0x00  Reserved
    0x003B  0x00  Reserved
    0x003C  0x00  Reserved
    0x003D  0x00  Reserved
    0x003E  0x00  Reserved
    0x003F  0x00  Reserved
    0x0040  0x14  Reserved
    0x0041  0x5C  Reserved
    0x0042  0x00  Reserved
    0x0043  0x00  Reserved
    0x0044  0x80  Reserved
    0x0045  0x00  Reserved
    0x0046  0x00  Reserved
    0x0047  0x00  Reserved
    0x0048  0x01  APB_CTL
    0x0049  0x68  APB_ADR0
    0x004A  0x01  APB_ADR1
    0x004B  0x00  APB_DATA0
    0x004C  0x00  APB_DATA1
    0x004D  0x00  APB_DATA2
    0x004E  0x00  APB_DATA3
    0x004F  0x00  BRIDGE_CTL
    0x0050  0x17  BRIDGE_STS
    0x0051  0xA1  EDID_ID
    0x0052  0x1E  EDID_CFG0
    0x0053  0x00  EDID_CFG1
    0x0054  0x28  BRIDGE_CFG
    0x0055  0x0C  AUDIO_CFG
    0x0056  0x00  TMDS_FIFO
    0x0057  0x00  reserved
    0x0058  0x00  reserved
    0x0059  0x00  reserved
    0x005A  0x02  DUAL_STS
    0x005B  0x20  DUAL_CTL1
    0x005C  0x02  DUAL_CTL2
    0x005D  0x06  FREQ_LOW
    0x005E  0x44  FREQ_HIGH
    0x005F  0x00  HDMI_FREQ
    0x0060  0x22  SPI_TIMING1
    0x0061  0x02  SPI_TIMING2
    0x0062  0x00  SPI_CONFIG
    0x0064  0x10  PGCTL
    0x0065  0x00  PGCFG
    0x0066  0x00  PGIA
    0x0067  0x00  PGID
    0x0068  0x00  Reserved
    0x0069  0x00  Reserved
    0x006A  0x00  Reserved
    0x006B  0x00  Reserved
    0x006C  0x00  Reserved
    0x0070  0x00  SlaveID[1]
    0x0071  0x00  SlaveID[2]
    0x0072  0x00  SlaveID[3]
    0x0073  0x00  SlaveID[4]
    0x0074  0x00  SlaveID[5]
    0x0075  0x00  SlaveID[6]
    0x0076  0x00  SlaveID[7]
    0x0077  0x00  SlaveAlias[1]
    0x0078  0x00  SlaveAlias[2]
    0x0079  0x00  SlaveAlias[3]
    0x007A  0x00  SlaveAlias[4]
    0x007B  0x00  SlaveAlias[5]
    0x007C  0x00  SlaveAlias[6]
    0x007D  0x00  SlaveAlias[7]
    0x0080  0x00  Reserved
    0x0081  0x00  Reserved
    0x0082  0x00  Reserved
    0x0083  0x00  Reserved
    0x0084  0x00  Reserved
    0x0090  0x00  Reserved
    0x0091  0x00  Reserved
    0x0092  0x00  Reserved
    0x0093  0x00  Reserved
    0x0094  0x00  Reserved
    0x0098  0x00  Reserved
    0x0099  0x00  Reserved
    0x009A  0x00  Reserved
    0x009B  0x00  Reserved
    0x009C  0x00  Reserved
    0x009D  0x00  Reserved
    0x009E  0x00  Reserved
    0x009F  0x00  Reserved
    0x00A0  0x00  Reserved
    0x00A1  0x00  Reserved
    0x00A2  0x00  Reserved
    0x00A3  0x00  Reserved
    0x00C0  0x00  Reserved
    0x00C1  0x00  Reserved
    0x00C2  0xA8  Reserved
    0x00C3  0x00  Reserved
    0x00C4  0x40  Reserved
    0x00C5  0x38  Reserved
    0x00C6  0x00  HDCP_ICR
    0x00C7  0x00  HDCP_ISR
    0x00C8  0xC0  Reserved
    0x00C9  0x00  Reserved
    0x00CA  0x00  Reserved
    0x00CB  0x00  Reserved
    0x00CC  0x00  Reserved
    0x00CE  0xFF  Reserved
    0x00D0  0x00  Reserved
    0x00D1  0x00  Reserved
    0x00D2  0x00  Reserved
    0x00D3  0x00  Reserved
    0x00E0  0x00  Reserved
    0x00E1  0x00  Reserved
    0x00E2  0xA8  Reserved
    0x00E3  0x00  Reserved
    0x00E4  0x40  Reserved
    0x00E5  0x38  Reserved
    0x00E6  0x00  Reserved
    0x00E7  0x00  Reserved
    0x00F0  0x5F  HDCP_TX_ID0
    0x00F1  0x55  HDCP_TX_ID1
    0x00F2  0x42  HDCP_TX_ID2
    0x00F3  0x39  HDCP_TX_ID3
    0x00F4  0x34  HDCP_TX_ID4
    0x00F5  0x39  HDCP_TX_ID5
    0x00F6  0x00  Reserved
    0x00F8  0x00  Reserved
    0x00F9  0x00  Reserved






    Regards,
    Abhishek Sonar
    Tata Motors

  • Hi Abhishek,

    Thank you for the register info. Is the display module containing the UB948 powered on? The UB949 is not detecting any deserializer the link.

    What are you using as the HDMI source? In register 0x50 (BRIDGE_STS), there is no detection of the RX_5V signal on the HDMI interface.

    Regardless of the deserializer status, you can force the link ready status in the UB949 to allow the HDMI source to send video to the UB949. To force the link ready status, enable bit 6 in register 0x5C (DUAL_CTL2).

    Best,

    Jack

  • Hello Jack,

    Yes, we are using an HDMI source from the laptop, and we have applied the register settings as per your suggestion. For reference, I am attaching the images below.

    Below are complete details of our system
    1. We are using UB949A EVM as serializer & UB948 as deserializer on Display TFT PCB (Resolution: 1920*720)
    2. we are currently testing the video with help of laptop.
    3. Display Deser Address: 0x58 (8bit) / 0x2C(7bit)

    Can you please support in below points
    1. we are able to detect the video source, But we are still unable to detect the deserializer. We have already verified the required power at the deserializer board (UB948).
    2. support to generate the EDID file for 1920*720 (attached the display specification below)
    3. Please check the Register configuration & any Hardware registers need to changed according to the deser side Schematic.
    4. 1920*720 is unusual resolution to create video from laptop, can we use the PATGEN to create the pattern and disconnect the HDMI source?

    Kindly suggest the next appropriate steps for the bring-up process.

    Looking forward to your guidance.


    final Des UB948 Schematic.pdf

    Register Display - ALP Nano 1 - DS90UB949, Connector 1

     

    Register  Data  Name
    0x0000  0x18  I2C Device ID
    0x0001  0x00  Reset
    0x0003  0xDA  General Configuration
    0x0004  0x80  Mode Select
    0x0005  0x00  I2C Master Config
    0x0006  0x59  DES ID
    0x0007  0x00  SlaveID[0]
    0x0008  0x00  SlaveAlias[0]
    0x0009  0x00  Reserved
    0x000A  0x00  Back Channel CRC Errors
    0x000B  0x00  Back Channel CRC Errors
    0x000C  0x04  General Status
    0x000D  0x20  GPIO[0] Config
    0x000E  0x00  GPIO[1] and GPIO[2] Config
    0x000F  0x00  GPIO[3] Config
    0x0010  0x00  GPIO[5] and GPIO[6] Config
    0x0011  0x00  GPIO[7] and GPIO[8] Config
    0x0012  0x00  Datapath Control
    0x0013  0x88  General Purpose Control
    0x0014  0x00  BIST and DOPL Control
    0x0015  0x01  I2C_VSELECT
    0x0016  0xFE  BCC Watchdog Control
    0x0017  0x9E  I2C Control
    0x0018  0x7F  SCL High Time
    0x0019  0x7F  SCL Low Time
    0x001A  0x01  Datapath Control 2
    0x001B  0x00  BIST BC Error Count
    0x001C  0x00  GPI Pin Status 1
    0x001D  0x00  GPI Pin Status 2
    0x001E  0x05  TX_PORT_SEL
    0x001F  0xF5  Frequency Counter
    0x0020  0x00  Deserializer Capabilities 1
    0x0021  0x00  Deserializer Capabilities 2
    0x0022  0x25  Reserved
    0x0023  0x00  Reserved
    0x0024  0x00  Reserved
    0x0025  0x00  Reserved
    0x0026  0x00  Link Detect Control
    0x0027  0x00  Reserved
    0x0028  0x01  Reserved
    0x0029  0x20  Reserved
    0x002A  0x20  Reserved
    0x002B  0xA0  Reserved
    0x002C  0x00  Reserved
    0x0030  0x00  SCLK_CTRL
    0x0031  0x00  AUDIO_CTS0
    0x0032  0x00  AUDIO_CTS1
    0x0033  0x00  AUDIO_CTS2
    0x0034  0x00  AUDIO_N0
    0x0035  0x00  AUDIO_N1
    0x0036  0x00  AUDIO_N2_COEFF
    0x0037  0x00  CLK_CLEAN_STS
    0x0038  0x00  Reserved
    0x0039  0x00  Reserved
    0x003A  0x00  Reserved
    0x003B  0x00  Reserved
    0x003C  0x00  Reserved
    0x003D  0x00  Reserved
    0x003E  0x00  Reserved
    0x003F  0x00  Reserved
    0x0040  0x14  Reserved
    0x0041  0x5C  Reserved
    0x0042  0x00  Reserved
    0x0043  0x00  Reserved
    0x0044  0x80  Reserved
    0x0045  0x00  Reserved
    0x0046  0x00  Reserved
    0x0047  0x00  Reserved
    0x0048  0x01  APB_CTL
    0x0049  0x68  APB_ADR0
    0x004A  0x01  APB_ADR1
    0x004B  0xD0  APB_DATA0
    0x004C  0x02  APB_DATA1
    0x004D  0x00  APB_DATA2
    0x004E  0x00  APB_DATA3
    0x004F  0x00  BRIDGE_CTL
    0x0050  0x97  BRIDGE_STS
    0x0051  0xA1  EDID_ID
    0x0052  0x1E  EDID_CFG0
    0x0053  0x00  EDID_CFG1
    0x0054  0x28  BRIDGE_CFG
    0x0055  0x0C  AUDIO_CFG
    0x0056  0x00  TMDS_FIFO
    0x0057  0x00  reserved
    0x0058  0x00  reserved
    0x0059  0x00  reserved
    0x005A  0xCD  DUAL_STS
    0x005B  0x20  DUAL_CTL1
    0x005C  0x42  DUAL_CTL2
    0x005D  0x06  FREQ_LOW
    0x005E  0x44  FREQ_HIGH
    0x005F  0x4A  HDMI_FREQ
    0x0060  0x22  SPI_TIMING1
    0x0061  0x02  SPI_TIMING2
    0x0062  0x00  SPI_CONFIG
    0x0064  0x10  PGCTL
    0x0065  0x00  PGCFG
    0x0066  0x0D  PGIA
    0x0067  0x16  PGID
    0x0068  0x30  Reserved
    0x0069  0x00  Reserved
    0x006A  0x00  Reserved
    0x006B  0x00  Reserved
    0x006C  0x00  Reserved
    0x0070  0x00  SlaveID[1]
    0x0071  0x00  SlaveID[2]
    0x0072  0x00  SlaveID[3]
    0x0073  0x00  SlaveID[4]
    0x0074  0x00  SlaveID[5]
    0x0075  0x00  SlaveID[6]
    0x0076  0x00  SlaveID[7]
    0x0077  0x00  SlaveAlias[1]
    0x0078  0x00  SlaveAlias[2]
    0x0079  0x00  SlaveAlias[3]
    0x007A  0x00  SlaveAlias[4]
    0x007B  0x00  SlaveAlias[5]
    0x007C  0x00  SlaveAlias[6]
    0x007D  0x00  SlaveAlias[7]
    0x0080  0x00  Reserved
    0x0081  0x00  Reserved
    0x0082  0x00  Reserved
    0x0083  0x00  Reserved
    0x0084  0x00  Reserved
    0x0090  0x00  Reserved
    0x0091  0x00  Reserved
    0x0092  0x00  Reserved
    0x0093  0x00  Reserved
    0x0094  0x00  Reserved
    0x0098  0x00  Reserved
    0x0099  0x00  Reserved
    0x009A  0x00  Reserved
    0x009B  0x00  Reserved
    0x009C  0x00  Reserved
    0x009D  0x00  Reserved
    0x009E  0x00  Reserved
    0x009F  0x00  Reserved
    0x00A0  0x00  Reserved
    0x00A1  0x00  Reserved
    0x00A2  0x00  Reserved
    0x00A3  0x00  Reserved
    0x00C0  0x00  Reserved
    0x00C1  0x00  Reserved
    0x00C2  0xA8  Reserved
    0x00C3  0x00  Reserved
    0x00C4  0x40  Reserved
    0x00C5  0x00  Reserved
    0x00C6  0x00  HDCP_ICR
    0x00C7  0x00  HDCP_ISR
    0x00C8  0xC0  Reserved
    0x00C9  0x00  Reserved
    0x00CA  0x00  Reserved
    0x00CB  0x00  Reserved
    0x00CC  0x00  Reserved
    0x00CE  0xFF  Reserved
    0x00D0  0x00  Reserved
    0x00D1  0x00  Reserved
    0x00D2  0x00  Reserved
    0x00D3  0x00  Reserved
    0x00E0  0x00  Reserved
    0x00E1  0x00  Reserved
    0x00E2  0xA8  Reserved
    0x00E3  0x00  Reserved
    0x00E4  0x40  Reserved
    0x00E5  0x38  Reserved
    0x00E6  0x00  Reserved
    0x00E7  0x00  Reserved
    0x00F0  0x5F  HDCP_TX_ID0
    0x00F1  0x55  HDCP_TX_ID1
    0x00F2  0x42  HDCP_TX_ID2
    0x00F3  0x39  HDCP_TX_ID3
    0x00F4  0x34  HDCP_TX_ID4
    0x00F5  0x39  HDCP_TX_ID5
    0x00F6  0x00  Reserved
    0x00F8  0x00  Reserved
    0x00F9  0x00  Reserved

    Regards,
    Abhishek Sonar
    Tata Motors

  • Hi Abhishek,

    Thank you for the schematic of the board. In your latest register dump, I see that the General Status register (0x0C) is 0x04. The UB949 is detecting the HDMI input but it does not detect back channel signal from the UB948 (Link Detect status). The back channel signal is generated independently of the forward channel signal from the UB949 which is why I suggested checking the power earlier.

    2. support to generate the EDID file for 1920*720 (attached the display specification below)

    I will send over EDID file tomorrow.

    3. Please check the Register configuration & any Hardware registers need to changed according to the deser side Schematic.

    Can you check that the 948_EN node is at 3.3v? If the device is powered on but not sending a back channel signal, the device might be in power down mode.

    If you have access to the I2C port on the 948 board, try see if you can connect to it via ALP.

    4. 1920*720 is unusual resolution to create video from laptop, can we use the PATGEN to create the pattern and disconnect the HDMI source?

    Yes. PATGEN can be used to provide a deterministic video source from the SER.

    Best,

    Jack

  • Hi Abhishek,

    Below is the script to upload the 1920*720 EDID file. The EDID needs to be programmed before the HDMI input is connected. Or you can set EXT_CTL = 1 via MODE_SEL, program the EDID, and then use register writes to set EXT_CTL = 0.

    Because we are moving over to email, I will close this thread for now

    Best,

    Jack

    # Script to load EDID
    serAddr =0x18
    
    exEDID = [0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x04, 0x21, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
    0x01, 0x00, 0x01, 0x04, 0xA0, 0xF4, 0x5B, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00,
    0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0xC4, 0x24, 0x80, 0x90, 0x70, 0xD0, 0x28, 0x20, 0x30, 0x30,
    0xFF, 0x00, 0xF4, 0x5B, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00]
    
    
    board.WriteI2C(serAddr,0x48,0xD)
    for x in range(0,256):
    	board.WriteI2C(serAddr,0x49,x)
    	board.WriteI2C(serAddr,0x4B,exEDID[x])
    

  • Hi Abhishek,

    This is an update about the action items we discussed in the meeting today.

    Regarding the PDB issue, please monitor the 948 power rails (VDDIO, VDD33, VDD12) and PDB pin to capture abnormalities and toggle PDB if possible. Once you receive the external USB2Any, try communicating with the 948 using the I2C lines (SDA, SCLK). 

    The Apps team will send the PATGEN script to bring up the 949-948 system once we verify the 948 is properly powered up. 

    Unfortunately, we do not provide samples for the 948 EVM so you would need to order it from TI.com.

    The general workflow is:

    1) Debug 948 PDB issue

    2) Bring up PATGEN with provided script (949 PATGEN--> 948/Display system)

    3) Bring up end-to-end video (HDMI Source-->949-->948/Display system)

    Also, can you please the relevant collateral and Tier1 information for the display? 

    Let’s document all the updates on this E2E so we can keep everything centralized. Please update us with the power and PDB measurements and whether I2C communication is successful for the 948.

    BR,

    Esther

  • Hi Abhishek,

    See attached script for 949 PATGEN with internal timing and internal PCLK.

    board.WriteI2C(0x18, 0x64, 0x00)    #   Disable PATGEN
    board.WriteI2C(0x18, 0x66, 0x03)
    board.WriteI2C(0x18, 0x67, 0x11)    #   PATGEN_CDIV_N		
    board.WriteI2C(0x18, 0x66, 0x04)		
    board.WriteI2C(0x18, 0x67, 0x10)    #	THW_7:0
    board.WriteI2C(0x18, 0x66, 0x05)		
    board.WriteI2C(0x18, 0x67, 0x88)    #	TVW_3:0
    board.WriteI2C(0x18, 0x66, 0x06)		
    board.WriteI2C(0x18, 0x67, 0x2F)    #	TVW_11:4
    board.WriteI2C(0x18, 0x66, 0x07)		
    board.WriteI2C(0x18, 0x67, 0x80)    #	AHW_7:0
    board.WriteI2C(0x18, 0x66, 0x08)		
    board.WriteI2C(0x18, 0x67, 0x07)    #	AVW_3:0
    board.WriteI2C(0x18, 0x66, 0x09)		
    board.WriteI2C(0x18, 0x67, 0x2D)    #	AVW_11:4
    board.WriteI2C(0x18, 0x66, 0x0A)		
    board.WriteI2C(0x18, 0x67, 0x30)    #	HSW_7:0
    board.WriteI2C(0x18, 0x66, 0x0B)		
    board.WriteI2C(0x18, 0x67, 0x0F)    #	VSW_7:0
    board.WriteI2C(0x18, 0x66, 0x0C)	
    board.WriteI2C(0x18, 0x67, 0x30)    #	HBP
    board.WriteI2C(0x18, 0x66, 0x0D)		
    board.WriteI2C(0x18, 0x67, 0x0A)    #	VBP
    board.WriteI2C(0x18, 0x66, 0x0E)		
    board.WriteI2C(0x18, 0x67, 0x00)    #	VS_POL
    board.WriteI2C(0x18, 0x66, 0x1A)
    board.WriteI2C(0x18, 0x67, 0x02)    #   PATGEN_CDIV_M
    board.WriteI2C(0x18, 0x65, 0x04)    #	Internal timing
    board.WriteI2C(0x18, 0x64, 0x11)	

    Best,

    Jack