Tool/software:
Hello,
we are working on APL device prototype (Spur device capable on 1V operation only).
We use the DP83TD510 PHY in our APL prototype.
Our configuration at startup
- 1V mode (PMA_CTRL.Bit12 = 0)
- Ability bits set according to spur port specification (AN_CTRL_10BT1 = 0x8000)
- Enable AN (AN_CONTROL:mr_an_enable = 1)
- Master mode (PMA_PMD_CTRL.cfg_master_slave_val = 1)
- Software reset
With this base configuration we can establish a link with various devices (2 different 10Base-T1L switches, 1 evaluation kit with a different PHY, and with the DP83TD510 EVM)
Later, we change the AN and master/slave configuration as described below depending on external switches.
We have two major problems:
- When the AN is disabled (AN_CONTROL:mr_an_enable = 0), the output changes to 3PAM signal, which is not correct according to APL testers. This is observed directly on DUT without the link partner connection (with added 100 Ohm termination)
- When the AN is disabled and slave mode is enforced (PMA_PMD_CTRL.cfg_master_slave_val = 0, AN_ADV_1.Bit12 = 1) the PHY becomes completely silent, and the link cannot be established with any of the above-mentioned partners.
What we need:
To pass the APL test 146.3.1 (PCS Transmit Signaling). We fail at first step when the link should be established with the AN disabled and DUT set as SLAVE.
Are the steps described above correct in general?
Is there any other approach how to reach the state required by the APL test?
Thank you in advance for a support.
Kind regards,
Petr Sulima