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TCA6424A: Question: About register settings

Part Number: TCA6424A

Tool/software:

◆Question

1.Are "Polarity Inversion Registers" registers that can invert the polarity of only the input ports?

2.Are the "Configuration Registers" registers that can only be configured for output ports?

       Also, could you please tell me in what specific cases these settings are necessary?

Best regards

  • This will be an additional question.

    3.Do I need to set the configuration registers to 0 when using it as an output port? (Since the default is all 1s)

    4.Can't I just set the output port registers (registers 4, 5, and 6) to use it as an output port?

  • User6448843,

    1.Are "Polarity Inversion Registers" registers that can invert the polarity of only the input ports?

    Polarity inversion should affect both pins configured as inputs and outputs. 

    2.Are the "Configuration Registers" registers that can only be configured for output ports?

    Not exactly. Configuration registers are used to configure the direction of a pin. This register is used to configure whether a pin is a high-z input or a push-pull output. 

           Also, could you please tell me in what specific cases these settings are necessary?

    IO expanders are used when an MCU runs out of external GPIO's. Thus you can use the I2C bus as an extension of several IO's using our devices. 

    Our IO expanders allow the user to configure many pins to their needs as a mix of inputs and outputs defined by the configuration register of the IO expander. 

    3.Do I need to set the configuration registers to 0 when using it as an output port? (Since the default is all 1s)

    This is correct. For example, setting bit C-07 = 0 will set P07 as an OUTPUT. 

    C-07 = 1 will set P07 as an INPUT (this is default on power-up). 

    4.Can't I just set the output port registers (registers 4, 5, and 6) to use it as an output port?

    You can think of the configuration register as the direction bit. It determines whether the pin is an output or an input (data flowing out, data flowing in). 

    The output port register controls the logic on pins configured as an output. If the output port register is a 1 for a specific pin, then a logic HIGH will result. Likewise, if the output port register is a 0 for a specific pin, the corresponding output pin will pull LOW. 

    Regards,

    Tyler

  • Sorry.
    I have another question about the TCA6424A.

    ★This is a question about the auto-increment feature.

     Is it correct to understand the data communication when the auto-increment function is enabled and disabled as follows?
     (Please refer to the Excel file.)

    Data Communication (Writes).xlsx

  • User644884, 

    All good. Ask any question any time. 

    The excel document is close to correct. 

    When auto increment is disabled in a write command, the data will be written to the addressed register once. If multiple data bytes are sent, the register selected will be over written. 

    For example writing a single byte to the output port register at 0x04 requires: 

    (1) Target Address

    (2) Register Address (Command Byte Address) = 0x04

    (3) Data to Output Port 0

    (4) Stop bit

    Another example when AI is disabled and writing multiple bytes to the output port register at 0x04 requires: 

    (1) Target Address

    (2) Register Address (Command Byte Address) = 0x04

    (3) Data to Output Port 0

    (4) Data to Output Port 0

    (5) Data to Output Port 0...

    (N) Stop bit

    This scenario changes when auto increment is enabled. AI enabled automatically cycles through the registers in the selected bank defined by the sent command byte. 

    Example when AI is enabled and writing multiple bytes to the output port register at 0x04: 

    (1) Target Address

    (2) Register Address (Command Byte Address) = 0x04

    (3) Data to Output Port 0

    (4) Data to Output Port 1

    (5) Data to Output Port 2

    (N) Stop bit

    If more than 3 bytes are sent, the following occurs: 

    (1) Target Address

    (2) Register Address (Command Byte Address) = 0x04

    (3) Data to Output Port 0

    (4) Data to Output Port 1

    (5) Data to Output Port 2

    (6) Data to Output Port 0

    (7) Data to Output Port 1

    (8) Data to Output Port 2

    ...

    (N) Stop bit

    Let me know if this helps. 

    Regards,

    Tyler

  • Your answer about the AI ​​function seems very useful.
    Thank you.

    Let me also ask a question about read (READ) communication.

    If the host performs the communication shown in Figure 8-9 during the interrupt (/INT) detection routine, will the TCA6424A be automatically restarted and the LSB bit set to 1?

    Data Communication (Reads).xlsx

  • User6448843,

    The final ACK bit of the 4 byte transaction: target address, command byte, target address, data, is when the interrupt will be de-asserted. If the interrupt is generated at some point during the read frame, then this read transaction would be able to catch the interrupt. If the interrupt is triggered after the 4-byte read frame, then of course the read frame would need to be sent again to clear the interrupt. 

    Regards,

    Tyler

  • Sorry, but I have one more question.

    Could you please explain what exactly you mean by restarting with a read operation?

    (I don't think you mean rebooting the host controller or the TCA6424A, is that correct?)

  • In the I²C protocol, a restart is a start condition that is sent without a preceding stop condition. For practical purposes, a start-write-restart-read-stop sequence works the same as start-write-stop and then start-read-stop.

  • User6448843,

    I agree with Clemens here. Please let me know if his response made sense. 

    Regards,

    Tyler

  • Sorry, but I have one more question.

    This device has the default setting of input and the logic is undefined,

    but could you please tell me the appropriate way to deal with unused ports?

  • Configure unused pins as outputs, or leave them as inputs and add a pull-up or -down resistor.

  • User6448843,

    Again, I agree with Clemens here. PU or PD resistor is best case if the pin is left configured as an INPUT. 

    If you don't want to go with the resistor route, consider floating the pin, but configuring it as an OUTPUT. 

    Regards,

    Tyler

  • Sorry.
    I have the following questions about connecting via SMBus.

    1. Is the TCA6424A command format (communication protocol) the same as I2C?

    2. Is the function and operation of the /INT terminal the same as when communicating via I2C?

  • Additional questions regarding SMBus communication:

    3. Is the communication speed of SMBUS equivalent to that of I2C BUS?

  • This device is compatible with both I²C and SMBus hosts. (The SMBus specifications defines some optional features that the TCA6424A does not implement.)

  • User6448843,

    As Clemens mentioned to your points 1 and 3, TCA6424A is compatible with the SMbus protocol, minus some optional features. 

    To answer point 2, the function and operation of the /INT terminal is the same with either I2C or SMBus protocol. 

    Regards,

    Tyler

  • In a configuration where the host is connected via SMBus and the TCA6424A is connected to the slave, if the host outputs a clock (SCL) of 400 kHz, can the TCA6424A communicate at this speed?
    (This is a confirmation, as the SMBus communication speed is generally regulated at 100 kHz.)

  • User6448843, 

    TCA6424A works up to 400 kHz I2C clock speed. 

    Regards,

    Tyler

  • Sorry for confirming.

    1. Does the TCA6424A's SMBus support 400kHz?
     ※According to this reference document, the SMBus transfer speed is 10kHz to 100kHz.

    Reference Documents

     www.nxp.com/.../AN4471.pdf

      

    2. Up to what SMBus specification version does the TCA6424A support?

     (For example, I would like to know whether the SMBus specification is up to v2.0 or v3.1.)

    Best regards.

  • User6448843,

    TCA6424A can support 400 kHz. 

    I don't know the specific differences between the V2.0 or V3.1 spec. 

    From a data frame perspective, TCA6424A can interpret SMBus messages following the start, byte, ack/nack, stop format. TCA6424A would not recognize the special reserved commands for the following addresses however. The more software defined features of SMBus are not supported by the TCA6424A. 

    Regards,

    Tyler