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DS90UB940-Q1: How to configurate to 2 lanes and Low power mode?

Violet Lei
Intellectual 1846 points
Part Number: DS90UB940-Q1
Other Parts Discussed in Thread: ALP

Tool/software:

Hi team

The customer: OEM:NISSAN  Tier1:Marelli

system: CID--981--940--SoC--serdes--cluster (they need to repeat the CID pattern to cluster)

The customer have isolated the link: SoC--serdes--cluster is OK, But it's not OK if only 940 send the Pattern;

issues1: how to configurate the mode to 2lanes, did the code is useful?

issues2: the SoC power sequence requirement: 940CSI output is low power, and then the SoC did some configuration, and then 940 bring up; could you help to check whether the 940 support the 'sleep mode\LP mode' and how to configurate it ?

Best Regards

Violet

  • 0
    TI__Mastermind 22820 points

    Hi Violet, 

    When you mentioned 940 sending pattern, did you mean that the deserializer is doing the pattern generation? Could you share the script used for this? It would depend on the display timings. Please share the script for this or the procedure on ALP.

    Have they tested 981-940- SoC with pattern generation enabled on 981 serializer? 

    For using 2 MIPI lanes, please check the "Device Functional Modes' section of the datasheet and see if it the hardware strapped matches what is required. Can you also check whether there is toggling on the data and clock lanes at all when the des 940 PatGen is used?

    Best regards,
    Ikram

  • 0 in reply to Ikram Haque
    TI__Intellectual 1846 points

    Hi Ikram

    We've resolved the issues, because the customer CSI-Voltage didn't match the SoC.

    But a quick question, Did our device support the 'sleep mode' ?

    BR

    Violet