DP83867E: & AWR2944 issues

radar_pete

Part Number: DP83867E
Other Parts Discussed in Thread: AWR2944EVM, AWR2944,

Tool/software:

Hi,

We have designed some custom RF and Digital boards based on the AWR2944EVM evaluation board. We have the AWR2944 radar transceiver on the RF board and the DP83867E Ethernet PHY on the Digital board, with a Samtec QTS-0 5 0-0 2-X-D-A board-to-board connector used to transition RGMII signals between the boards.

We are having issues communicating with the board over Ethernet - when we run the TDM Ethernet example provided in the SDK and enter queryLocalIP we get an IP address returned of 0.0.0.0. When running our own custom firmware we get 'link is not up' message. We have connected from the board via a router (same setup proven with AWR2944EVM board).

It seems that auto-negotiation is not happening as the clock from the MAC on the AWR2944 to the Ethernet PHY (RGMII TX CLK) is at 25 MHz speed (for 100 Mbps rate) but the clock from the Ethernet PHY to the MAC on the AWR2944 (RGMII RX CLK) is at 2.5 MHz speed.

We have tried in the firmware things like adjusting delay between clock/data (tx/rx delayInPs variable), forcing 10 Mbps speed (with auto-negotiation off) but no luck in getting it to work.

See screenshots below from board schematics:

Digital board:

RF board:

8 months ago

0 Vivaan Jaiswal 8 months ago

TI__Expert 6385 points

Hi Radar,

Thank you for sharing the information.

We will review it and get back to you later today.

Regards,

Vivaan

0 Hillman Lin 8 months ago in reply to Vivaan Jaiswal

TI__Mastermind 25945 points

Hi Radar,

Are you able to read register 0x0000 to 0x001F?

Regards,

Hillman Lin

0 Aleksa Anicic 7 months ago in reply to Hillman Lin

Prodigy 230 points

Hi Hilman,

I am Pete's colleague.

We can read and write registers. If I'm not mistaken, you are referring to the PHY_BMCR and DP83867_CTRL registers. We get these values for them:

bmcrRegValue = 0x1140;
dpCtrlReg = 0x0000;

In the attachment, you can find logs with register dumps in different states of the Ethernet initialization. Both logs use the same firmware, with the only difference being that a successful log was running on the awr2944 eval board, and the faulty one was running on our custom PCB. I've provided a text file that compares the differences between the two. Is there a chance you could inspect these files and give some feedback on what we should try?

These logs were created with auto-negotiation enabled, but as Pete said, we did a test with it turned off and multiple other configuration changes. They all lead to the same result - it works well on the eval board, but it doesn't work on our custom PCB.

Cheers,
Aleksa

Fullscreen comparison.txt Download

Differing registers:
====================
PHY 0: PHYSTS      = 0x7c02 : 0x0302
PHY 0: ISR         = 0x1c42 : 0x0040
PHY 0: STRAPSTS2   = 0x0100 : 0x0130
PHY 0: RGMIIDCTL   = 0x0077 : 0x0017
PHY 0: IOMUXCFG    = 0x0c0f : 0x0c0e

PHYSTS:
=======
0b0111'1100'0000'0010 - eval board
0b0000'0011'0000'0010 - custom PCB
15:14 - Speed selection. 01 = 100Mbps, 00 = 10Mbps
13    - Duplex mode. 1 = Full duplex, 0 = Half duplex
12    - Page received. 1 = Page received, 0 = Not
11    - Speed dupler resolution. 1 = Auto-Negotiation has completed or is disabled. 0 = Auto-Negotiation is enabled and has not completed.
10    - Link Status, 1 = Link is up. 0 = Link is down
09    - MDI/MDIX Resolution Status for C and D Line Driver Pairs. 1 = Resolved as MDIX, 0 = Resolved as MDI
08    - MDI/MDIX Resolution Status for A and B Line Driver Pairs. 1 = Resolved as MDIX, 0 = Resolved as MDI

ISR (1 = Interrupt is pending, 0 = No pending interrupt):
=========================================================
0b0001'1100'0100'0010 - eval board
0b0000'0000'0000'0100 - custom PCB
12    - Page Received Interrupt.
11    - Auto-Negotiation Complete Interrupt.
10    - Link Status Change Interrupt.
06    - MDI Crossover Change Interrupt.
03    - Wake-on-LAN Interrupt.
02    - xGMII Error Interrupt.

STRAPSTS2:
==========
0b0000'0001'0000'0000 - eval board
0b0000'0001'0011'0000 - custom PCB
06 : 04 - RGMII Transmit Clock Skew Strap. See RGMII Transmit Clock Skew Details table for more information.

RGMIIDCTL:
==========
0b0000'0000'0111'0111 - eval board
0b0000'0000'0001'0111 - custom PCB
07 : 04 - RGMII Transmit Clock Delay. 0111 = 2ns, 0001 = 0.5ns

IOMUXCFG:
=========
0b0000'1100'0000'1111 - eval board
0b0000'1100'0000'1110 - custom PCB
04 : 00 - Impedance control for MAC IOs. Output impedance approximate range from 35-70Ω in 32 steps. Lowest being 11111 and highest being 00000.

Notes and questions:
====================
1. Why would PHYSTS indicate that 'Auto-Negotiation has completed' after a transition from RESET_WAIT to ENABLE state?
2. ISR statuses double down on the information obtained in the PHYSTS.
3. Why do we have a strap for Transmit clock skew?

Fullscreen fail_custom_pcb.txt Download

[Cortex_R5_0] **********************************************
Debug: Launching the MMW Demo on MSS
**********************************************
Debug: Launched the Initialization Task
BSS is powered up...
Debug: mmWave Control Initialization was successful
Debug: mmWave Control Synchronization was successful
cpsw2g: features: 0x00000002
cpsw2g: errata  : 0x00000000
bmsrRegValue: 0x7949
PHY 0: INIT -> FINDING (20 ticks)
PHY 0: FINDING -> FOUND (0 ticks)
PHY 0: OUI:080028 Model:23 Ver:01 <-> 'dp83867'
PHY 0: open
Waiting chip configuration
Checking registers... [bmcrReg, Cfg2Reg]: [0x1140, 0x29C7]
PHY 0: FOUND
PHY 0: global soft-reset
PHY 0: FOUND -> RESET_WAIT (10 ticks)
PHY 0: RESET_WAIT
PHY 0: global soft-reset is complete
PHY 0: RESET_WAIT -> ENABLE (0 ticks)
State: ENABLE
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x7949
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x0000
PHY 0: ANER        = 0x0064
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0300
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x0302
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x0040
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x6150
PHY 0: LEDCR2      = 0x4040
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0002
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2055
PHY 0: STRAPSTS2   = 0x0130
PHY 0: RGMIIDCTL   = 0x0017
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0c2d
PHY 0: IOMUXCFG    = 0x0c0e
PHY 0: GPIOMUXCTRL = 0x0000
PHY 0: ENABLE
PHY 0: enable
PHY 0: Viterbi detector idle count thresh: 4
PHY 0: DSP FFE Equalizer: 641
PHY 0: disable loopback
PHY 0: soft-restart
PHY 0: enable automatic cross-over
PHY 0: enable Robust Auto-MDIX
PHY 0: MII mode: 3
PHY 0: clock shift TX:enable RX:enable
PHY 0: set delay 1750 ps TX, 1750 ps RX
PHY 0: set FIFO depth 4
PHY 0: set output impedance to 50000 milli-ohms
PHY 0: set gpio0 = mode6, gpio1 = mode0
PHY 0: set LED0 = mode0, LED1 = mode7, LED2 = mode1, LED3 = mode7
PHY 0: req caps: FD1000 HD1000 FD100 HD100 FD10 HD10
PHY 0: PHY caps: FD1000 HD1000 FD100 HD100 FD10 HD10
PHY 0: MAC caps: FD100 HD100 FD10 HD10
PHY 0: refined caps: FD100 HD100 FD10 HD10
BMSR_ANCAPABLE: 0x7949
PHY 0: PHY is NWAY-capable
PHY 0: setup NWAY
PHY 0: NWAY advertising: FD100 HD100 FD10 HD10
PHY 0: config is needed
PHY 0: restart autonegotiation
PHY 0: ENABLE -> NWAY_START (50 ticks)
State: NWAY_START
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x7949
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x0000
PHY 0: ANER        = 0x0064
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0000
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x0302
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x0040
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x7170
PHY 0: LEDCR2      = 0x4040
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0202
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2054
PHY 0: STRAPSTS2   = 0x0130
PHY 0: RGMIIDCTL   = 0x0066
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0e81
PHY 0: IOMUXCFG    = 0x0c12
PHY 0: GPIOMUXCTRL = 0x0006
PHY 0: NWAY_START (rem ticks 50)
PHY 0: NWAY_START -> NWAY_WAIT (80 ticks)
State: NWAY_WAIT
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x7949
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x0000
PHY 0: ANER        = 0x0064
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0000
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x0002
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x0040
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x7170
PHY 0: LEDCR2      = 0x4040
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0202
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2054
PHY 0: STRAPSTS2   = 0x0130
PHY 0: RGMIIDCTL   = 0x0066
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0e81
PHY 0: IOMUXCFG    = 0x0c12
PHY 0: GPIOMUXCTRL = 0x0006
PHY 0: NWAY_WAIT (rem ticks 80)
PHY 0: NWAY_WAIT (rem ticks 79)
PHY 0: NWAY_WAIT (rem ticks 78)
PHY 0: NWAY_WAIT (rem ticks 77)
PHY 0: NWAY_WAIT (rem ticks 76)
PHY 0: NWAY_WAIT (rem ticks 75)
...
...
...
PHY 0: NWAY_WAIT (rem ticks 0)
PHY 0: timeout has occured
PHY 0: NWAY_WAIT -> FOUND (0 ticks)
PHY 0: FOUND
PHY 0: global soft-reset
PHY 0: FOUND -> RESET_WAIT (10 ticks)
PHY 0: RESET_WAIT
PHY 0: global soft-reset is complete
PHY 0: RESET_WAIT -> ENABLE (0 ticks)
State: ENABLE
PHY 0: BMCR        = 0x1140
...
...
...

Fullscreen success_eval_board.txt Download

[Cortex_R5_0] **********************************************
Debug: Launching the MMW Demo on MSS
**********************************************
Debug: Launched the Initialization Task
BSS is powered up...
Debug: mmWave Control Initialization was successful
Debug: mmWave Control Synchronization was successful
cpsw2g: features: 0x00000002
cpsw2g: errata  : 0x00000000
bmsrRegValue: 0x796D
PHY 0: INIT -> FINDING (20 ticks)
PHY 0: FINDING -> FOUND (0 ticks)
PHY 0: OUI:080028 Model:23 Ver:01 <-> 'dp83867'
PHY 0: open
Waiting chip configuration
Checking registers... [bmcrReg, Cfg2Reg]: [0x1140, 0x29C7]
PHY 0: FOUND
PHY 0: global soft-reset
PHY 0: FOUND -> RESET_WAIT (10 ticks)
PHY 0: RESET_WAIT
PHY 0: global soft-reset is complete
PHY 0: RESET_WAIT -> ENABLE (0 ticks)
State: ENABLE
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x7949
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x0000
PHY 0: ANER        = 0x0064
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0300
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x7c02
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x1c42
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x6150
PHY 0: LEDCR2      = 0x4444
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0002
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2055
PHY 0: STRAPSTS2   = 0x0100
PHY 0: RGMIIDCTL   = 0x0077
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0c2d
PHY 0: IOMUXCFG    = 0x0c0f
PHY 0: GPIOMUXCTRL = 0x0000
PHY 0: ENABLE
PHY 0: enable
PHY 0: Viterbi detector idle count thresh: 4
PHY 0: DSP FFE Equalizer: 641
PHY 0: disable loopback
PHY 0: soft-restart
PHY 0: enable automatic cross-over
PHY 0: enable Robust Auto-MDIX
PHY 0: MII mode: 3
PHY 0: clock shift TX:enable RX:enable
PHY 0: set delay 1750 ps TX, 1750 ps RX
PHY 0: set FIFO depth 4
PHY 0: set output impedance to 50000 milli-ohms
PHY 0: set gpio0 = mode6, gpio1 = mode0
PHY 0: set LED0 = mode0, LED1 = mode7, LED2 = mode1, LED3 = mode7
PHY 0: req caps: FD1000 HD1000 FD100 HD100 FD10 HD10
PHY 0: PHY caps: FD1000 HD1000 FD100 HD100 FD10 HD10
PHY 0: MAC caps: FD100 HD100 FD10 HD10
PHY 0: refined caps: FD100 HD100 FD10 HD10
BMSR_ANCAPABLE: 0x796D
PHY 0: PHY is NWAY-capable
PHY 0: setup NWAY
PHY 0: NWAY advertising: FD100 HD100 FD10 HD10
PHY 0: config is needed
PHY 0: restart autonegotiation
PHY 0: ENABLE -> NWAY_START (50 ticks)
State: NWAY_START
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x7949
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x0000
PHY 0: ANER        = 0x0066
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0000
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x7c02
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x1c40
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x7170
PHY 0: LEDCR2      = 0x4444
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0202
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2054
PHY 0: STRAPSTS2   = 0x0100
PHY 0: RGMIIDCTL   = 0x0066
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0e81
PHY 0: IOMUXCFG    = 0x0c12
PHY 0: GPIOMUXCTRL = 0x0006
PHY 0: NWAY_START (rem ticks 50)
PHY 0: NWAY_START -> NWAY_WAIT (80 ticks)
State: NWAY_WAIT
PHY 0: BMCR        = 0x1140
PHY 0: BMSR        = 0x796d
PHY 0: PHYIDR1     = 0x2000
PHY 0: PHYIDR2     = 0xa231
PHY 0: ANAR        = 0x01e1
PHY 0: ANLPAR      = 0x41e1
PHY 0: ANER        = 0x0067
PHY 0: ANNPTR      = 0x2001
PHY 0: ANNPRR      = 0x0000
PHY 0: CFG1        = 0x0000
PHY 0: STS1        = 0x0000
PHY 0: 1KSCR       = 0x3000
PHY 0: PHYCR       = 0x5848
PHY 0: PHYSTS      = 0x6c02
PHY 0: MICR        = 0x0000
PHY 0: ISR         = 0x0000
PHY 0: CFG2        = 0x29c7
PHY 0: RECR        = 0x0000
PHY 0: BISCR       = 0x0000
PHY 0: STS2        = 0x0040
PHY 0: LEDCR1      = 0x7170
PHY 0: LEDCR2      = 0x4444
PHY 0: LEDCR3      = 0x0002
PHY 0: CFG3        = 0x0202
PHY 0: CTRL        = 0x0000
PHY 0: RGMIICTL    = 0x00d3
PHY 0: FLDTHRCFG   = 0x0221
PHY 0: VTMCFG      = 0x2054
PHY 0: STRAPSTS2   = 0x0100
PHY 0: RGMIIDCTL   = 0x0066
PHY 0: LOOPCR      = 0xe721
PHY 0: DSPFFECFG   = 0x0e81
PHY 0: IOMUXCFG    = 0x0c12
PHY 0: GPIOMUXCTRL = 0x0006
PHY 0: NWAY_WAIT (rem ticks 80)
PHY 0: local caps: FD100 HD100 FD10 HD10
PHY 0: partner caps: FD100 HD100 FD10 HD10
PHY 0: common caps: FD100 HD100 FD10 HD10
PHY 0: local caps: None
PHY 0: partner caps: None
PHY 0: common caps: None
PHY 0: common caps: FD100 HD100 FD10 HD10
PHY 0: negotiated mode: 100 Mbps full-duplex
PHY 0: NWAY_WAIT -> LINKED (0 ticks)

0 Gerome Cacho 7 months ago in reply to Aleksa Anicic

TI__Mastermind 39775 points

Hello,

Thank you for your query. Hillman is OoO and will be returning mid-week. Please expect a response from him by EoD Thursday 1/16 at worst.

Sincerely,
Gerome

0 Hillman Lin 7 months ago in reply to Gerome Cacho

TI__Mastermind 25945 points

Hi Aleksa,

May I ask in what condition did you read the registers? In both case, I did not see a link up on DP83867 through registers 0x0001 BMSR. If possible, could you read the register on both condition when the PHY is link up?

When DP83867 is link up, we should see register 0x0001 = 796D

We also have debug guide on DP83867, Hopefully this could help you with the basic debug:

https://www.ti.com/lit/an/snla246c/snla246c.pdf?ts=1736966673645&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDP83867E

Regards,

Hillman Lin

+1 radar_pete 7 months ago in reply to Hillman Lin

Intellectual 400 points

Hi Hillman, we found the issue - I had connected the LED_0 pin to LED cathode > current-setting resistor > VDDIO_ETH as I didn't realise that when mode 1 for the strap on this pin is set (to disable mirror enable) the pin acts as an active high driver and I should have connected the pin to current setting resistor > LED anode > GND, as per the eval board. I removed the LED and we now have Ethernet communications working.

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DP83867E: & AWR2944 issues