Is it possible to implement dual link DVI receiver with HDCP using two TFP501?
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Is it possible to implement dual link DVI receiver with HDCP using two TFP501?
Hello Alexander,
It is possible to implement a DVI dual-link using two TFP501, but it is not a straight solution. You can post here more information about your application to get support.
Regards.
Also, see the FAQ and Ref Design files at:
http://www.ti.com/lit/an/slla134/slla134.pdf
http://www.ti.com/lit/an/slla131/slla131.pdf
Alexander, especially refer to Note 10 from the FAQ: "To use 2 single link receivers for dual link, the DVI clock must be distributed to both receivers. The outputs of the 2 receivers must be recovered using their appropriate ODCK, any skew between the receivers removed, and converted to a single clock domain."
Hi, Elias,
Actually my question is related to HDCP support for dual link receiver.
I'd like to use two TFP501 to implement dual link DVI with HDCP. In this case I2C bus will have two TFP501 with different addresses (the first TFP501's DDC_SA is connected to gnd, the second TFP501's DDC_SA is connected to vcc) . Also, as I undestand, every TFP501 must has HDCP key EEPROM with the same content. Right?
So, schematics will contain two TFP501s, two HDCP key EEPROMs and one EDID EEPROM. Am I right?
"High-bandwidth Digital Content Protection System, Revision 1.4" from 8 July, 2009, paragraph "2.6 HDCP Port", page 28:
"The HDCP Receiver must present a logical device on the I 2 C bus for each link that it supports. No equivalent interface to HDCP Transmitters is specified. The eight-bit I2C device address (including the read/write bit, “x”) for the primary link is 0111010x binary, or 0x74 in the usual hexadecimal representation of I2C device addresses where the read/write bit is set to zero. The device address for the secondary link is 0x76."
Does it means that I can use TFP501 for implement Dual-link HDCP receiver by define 0x76 Address (pull-up pin 10 (A0), datasheet, page 14) for second link part?
Hello Dimitriy,
The paragraph you mentioned is mean for a integrated dual-link receiver (as Ross mentioned).
Also, in a dual-link system, ...the data content is 48-bits wide and requires two HDCP Ciphers to produce the required pseudo-random streams... (taken from HDCP Spec, section 3).
Regards.
But if we use TWO TFP501, that we have TWO HDCP Ciphers and each of them has its own I2C address (set 0x74 for the primary link and 0X76 for the secondary link, as said at HDCP Spec)..., is it so? :-/
What reason to implement adjustable I2C address (0x74/0x76) for TFP501?
Regards.
Dmitriy, you might be right. Sorry I don't have the answer to this. Using two TFP501's in dual-link is unfortunately not supported, although you may be able to make it work.
Best regards,
RE