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SN65LVDS179: Signal transition times for driver and differential receiver

John Griffith
Mastermind 21800 points
Part Number: SN65LVDS179

Tool/software:

Hello,

My customer noted that the test circuit figure, figure 12, mentions a 1ns rise and fall times and is asking if the input to the driver (D) or differential input (A & B) have any rise and fall time requirements. I cannot find any mention of Schmitt trigger inputs on the D pin, but I don't know what the minimum recommended time would be. Also, since the device has fail safe on the receiver (for floating or high impedance scenarios), I doubt the receiver has any transition time requirements. Can you help give any advice on how best to respond?

My gut reaction is to keep input transition times on a standard CMOS input <1µs, but some datasheets actually specify this. I don't see it in this datasheet. Do we have a recommendation? 

John

  • 0
    TI__Genius 15321 points

    Hi John,

    As you have noted, this device does not have input rise/fall time requirements. On the SN65LVDS179, a rise time and fall time of 1ns was used to capture the datasheet switching specs. To my knowledge, we do not have a specific minimum recommendation. However, as this application note details - Understanding Schmitt Triggers (Rev. A) it is best to consider this on devices without Schmitt trigger inputs.

    Thanks, Amy

  • 0 in reply to Amy
    TI__Mastermind 21800 points

    Just to clarify, is the driver input pin, the D pin, a Schmitt trigger input? My guess is no, it is not, but I want to confirm

    Thanks,

    John

  • 0 in reply to John Griffith
    TI__Guru 73181 points

    Hi John,

    Sorry for the delay in response. Amy has left TI so she could not get back to you.

    John Griffith said:
    is the driver input pin, the D pin, a Schmitt trigger input? My guess is no, it is not, but I want to confirm

    No, the D input does not have a schmitt trigger. The basic diagram of the input for this device is actually on the front page of the datasheet. Designers typically use these CMOS input structures with some overlap on the Vth to create a pseudo-hysteresis. Generally in the low 100mV range. 

    -Bobby