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XIO2001: XIO2001 read and write time is unstable

Part Number: XIO2001

Tool/software:

We have a new design, see the picture below,PCIEx16 access to PEX8748 by a cable, and then, a PCIEx1 port of the PEX8748 access to XIO2001, then expands several PCI slots.

The problem is that we read or write PCI slot devices through the CPU, and the read and write time is unstable, see the picture below, most of the time is about 35 us, sometimes it will jump to about 70 us, we want it to be stable at about 35 us.

Can you give us some guidelines? How can we solve this problem ,or which direction should we try to solve this problem?

Thank you!

  • Hi,

    Thank you for reaching out about this observation.

    Please help us to better understand the following to help us better assist you.

    1. What is pinpointing you to believe the issue lies with the XIO2001? Is a similar phenomena observed on other ports of the PEX8748 connected to the x16 CPU board? 
    2. Is this observed on specific PCI devices connected to the XIO2001?
    3. Are there any details about your configuration of the XIO2001 which you can share with us?

    Best,
    David

  • Hi,

    Thank you for your reply.

    1.Yes,we checked other ports of PEX8748,it is about 18us,see the picture below.

    2.Not on specific PCI device,we tried 2 PCI devices,the same phenomena.

    3.Configuration of the XIO2001 is show below.

    THANK YOU!

    Best!

  • Hi,

    Thank you for uploading your XIO2001 configuration. I noted a couple of items from looking over your configuration and have some follow-up questions about your XIO2001 register configuration:

    • M66EN tied to GND and PCLK66_SEL tied to 3.3V -> Enables 33MHz PCI clock
      • Do your PCI devices require a 33MHz PCI clock, or can they support a 66MHz PCI clock?
    • Is ASPM L0s or L1 currently enabled on your system to the XIO2001?
    • Could your provide an lspci -vv output for the XIO2001?

    Best,
    David

  • Hi,

    Thank you for your reply. Below is my reply.

    1、My PCI device doesn't support a 66MHz PCI clock,only 33MHz is supported.

    2、All XIO2001 register configuration is default,we do nothing about  register. So,I think ASPM L0s or L1 currently is disabled.

    3、I will try to provide the lspci a few days later.

    THANK YOU!

    BEST WISHES!

  • Hi,

    Is it possible to provide the ASPM setting of your chipset as well? This could have an impact on the XIO2001's performance based on Errata #3 or 4. This would most likely be set in the BIOS of your system.

    Please note that following statement from the ASLPMC field description: 

    • The default value for this is bit is determined by bits 29:28 (ASPM_CTRL_DEF_OVRD) in the general control register (offset D4h, see Section 8.4.66).

    Note that if this field were changed, this would result in a change to ASLPMC's default value as well.

    Best,
    David

  • I am closing this ticket due to no response over the last couple of weeks. If you have further questions, please feel free to follow-up with your questions below to re-open the ticket.