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DP83822I: 100Mbps is working, but having issues with 10Mbps

Krystal Horn
Prodigy 10 points

Part Number: DP83822I

Tool/software:

Hi, 

I am debugging an issue with the DP83822IR PHY not linking for 10Mbps.  However, I can get 100Mbps to link. 
Based on register settings, I am getting intermittent link established from  register 0x0010,bit[0], but is not flagged on register 0x001,bit[2], What causes this? 

The circuit board is bootstrapped to force 100BASE-TX Full-duplex 

Previously we have intermittent failures with connecting to the 100Mbps, but fixed this with adding a RX clock shift, but even with this implemented 10Mbps still is not working.
Have also changed register 0x0004 = 0x181 and 0x000B = 0x1000 and still experience issues with the 10Mbps not linking.

Any

Register Dump is as follows: 

0x0 0x100
0x1 0x7849
0x2 0x2000
0x3 0xA240
0x4 0x61
0x5 0x0
0x6 0x4
0x7 0x2001
0x8 0x0
0x9 0x0
0xA 0x100
0xB 0x100B
0xD 0x0
0xE 0x0
0xF 0x0
0x10 0x7
0x11 0x108
0x12 0x0
0x13 0x0
0x14 0x0
0x15 0x0
0x16 0x100
0x17 0x1202
0x18 0x400
0x19 0x21
0x1A 0x0
0x1B 0x7D
0x1C 0x5EE
0x1E 0x2
0x1F 0x0
0x25 0x0
0x27 0x2001
0x3E 0x2
0x3F 0x0
0x42 0xFFFF
0x106 0xFFFF
0x107 0xFFFF
0x10F 0xFFFF
0x114 0xFFFF
0x116 0xFFFF
0x126 0xFFFF
0x155 0xFFFF
0x170 0xFFFF
0x171 0xFFFF
0x173 0xFFFF
0x177 0xFFFF
0x180 0xFFFF
0x181 0xFFFF
0x182 0xFFFF
0x183 0xFFFF
0x184 0xFFFF
0x185 0xFFFF
0x186 0xFFFF
0x187 0xFFFF
0x188 0xFFFF
0x189 0xFFFF
0x18A 0xFFFF
0x215 0xFFFF
0x21D 0xFFFF
0x403 0x0
0x404 0x0
0x428 0x0
0x456 0x0
0x460 0x0
0x461 0x0
0x462 0x0
0x463 0x0
0x465 0x0
0x467 0x0
0x468 0x0
0x469 0x0
0x4A0 0x0
0x4A1 0x0
0x4A2 0x0
0x4A3 0x0
0x4A4 0x0
0x4A5 0x0
0x4A6 0x0
0x4A7 0x0
0x4A8 0x0
0x4A9 0x0
0x4AA 0x0
0x4AB 0x0
0x4AC 0x0
0x4AD 0x0
0x4AE 0x0
0x4AF 0x0
0x4B0 0x0
0x4B1 0x0
0x4B2 0x0
0x4B3 0x0
0x4B4 0x0
0x4B5 0x0
0x4B6 0x0
0x4B7 0x0
0x4B8 0x0
0x4B9 0x0
0x4BA 0x0
0x4BB 0x0
0x4BC 0x0
0x4BD 0x0
0x4BE 0x0
0x4BF 0x0
0x4C0 0x0
0x4C1 0x0
0x4C2 0x0
0x4C3 0x0
0x4C4 0x0
0x4C5 0x0
0x4C6 0x0
0x4C7 0x0
0x4C8 0x0
0x4C9 0x0
0x4CA 0x0
0x4CB 0x0
0x4CC 0x0
0x46D0 0x0
0x4D1 0x0
0x4D4 0x0
0x4D5 0x0
0x4D6 0x0
0x3000 0xFFFF
0x3001 0xFFFF
0x3014 0xFFFF
0x3016 0xFFFF
0x703C 0xFFFF
0x703D 0xFFFF

Any suggestions would be greatly appreciated

  • 0
    TI__Mastermind 44635 points

    Hello,

    I would encourage checking out our DP83822 troubleshooting guide. This has initial checks that typically plague designs listed out. If the items in this document do not further progress the debug, we may further discuss.

    Sincerely,

    Gerome

  • 0
    Prodigy 10 points

    Gerome, 

    I found another post that was similar and changed register 0x0004 to 0x1E1 (default) since I have it bootstrapped to 100Mbps and the links are established both in Registers 0x0001 bit 2 and in register 0x010 bit 0, but still fails for the Fast Link Down Mode Register 0x000B bits 3, 1, and 0. also still can't get valid data. 
    What would cause this? 

    Also ran through the troubleshooting guide and followed the analog loopback and get the same exact results.  If there is no 100Ohm termination, what issues does this cause? 

    I Plan on running through the MII Loopback, I'll return with results, but if you could help me understand the above that would be greatly appreciated. 

    Thanks,

    Krystal

  • 0 in reply to Krystal Horn
    Prodigy 10 points

    Ran the MII loopback test and still didn't get any valid data back (using wireshark), but the link status registers are all valid. 

  • 0 in reply to Krystal Horn
    TI__Expert 8185 points

    Hi Krystal, 

    Thank you for your query. Gerome is OoO today, and will be looking to respond to your query by EoD Thursday.

    Sincerely,

    Vivaan

  • 0 in reply to Vivaan Jaiswal
    TI__Mastermind 44635 points

    Hello,

    If MII loopback is failing, it suggests there is some issues to uncover on the MAC side. This could be setup/hold time based. This combined with the inconsistent link shown looks to be the basis of your communication issues.

    Some questions:

    - What is the link partner that is connected to DP83822?

    - While changing Reg 0x4 would be naturally advisable, this register is only valid when Auto-Negotiation (Reg 0x0) is enabled. Can you please see what happens if auto-neg is enabled?

    Sincerely,

    Gerome