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SN65ELT20: SN65ELT20D & SN65ELT21D

venkat subramanyam Bavitishetty
Prodigy 10 points
Part Number: SN65ELT20
Other Parts Discussed in Thread: SN65ELT21

Tool/software:

HII THERE WE ARE USING SN65ELT20D & SN65ELT21D INTERFACE OF OPTICAL COMMUNICATION. THE THING IS WE ARE FACING THE ISSUE WITH THE RECEIVER IC, AS THE SENDING SIGNAL IS FOUND OKAY (FEED THROUGH RS 232 BY USING DOCKLIGHT APPLICATION) AND CHECKED AT THE PINS OF 2&3 AT IC OF SN65ELT20D .BUT AT RECEIVER SIDE WE ARE NOT GETTING THE EXPECTED DATA.WE HAVE CHANGED THE COMBINATION OF PULL UP RESISTOR AND PULL DOWN AT RECEIVER SIDE.PLEASE SUGGEST ME TO SOLVE THE ISSUE.

 /resized-image/__size/320x240/__key/communityserver-discussions-components-files/138/pastedimage1738747158187v1.jpeg6683.OFC.pdf

  • 0
    TI__Intellectual 2250 points

    Hi Venkat,

    In your schematic Vcc of the SN65ELT21 does not appear to be connected to 5V, however, I assume this is just could just be a typo.

    The termination scheme for the PECL lines looks like it could be an issue. In your schematic it looks like a combination of two different termination schemes is implemented. One technique is to bias the PECL lines with resistors between Vcc/GND as shown in this diagram:

    Another technique is to use the Vbb output from the receiver in this configuration:

    Vbb has a maximum sink/source current of just 0.5mA and is expected to be used at high impedance inputs.

    Regards,

    Jack

  • 0
    Prodigy 10 points

    Hello Jack ,

     I've have tried and tested the circuit as per your suggestions but still we are unable to achieve the proper signal. The signal which we are sending is having fine until if we change the volts/dev section to mV then we found the Noise i.e. 200mV amplitude .I have placed the 0.1uF cap across ic Vcc and Gnd but still we are unable to achieve the proper signal.Can you please suggest us .

  • 0 in reply to venkat subramanyam Bavitishetty
    TI__Intellectual 2250 points

    Hi Venkat,

    Could you please share your updated schematic so I can see your current setup? Where are you seeing the 200mV of noise?

    Are you able to identify where in the signal chain the data is getting lost? You mentioned that the signals coming out of the driver look correct. Is the signal coming out of the OPT155-31405TR look correct? What about at the inputs to the receiver (D and D_n) and the receiver output (Q)? If you could include oscilloscope traces of these signals it might help with the debugging process.

    I also realized that the block diagram you included is very low resolution, if possible could you upload it again at a higher resolution?

    Regards,

    Jack

  • 0 in reply to Jack Campbell
    Prodigy 10 points

    6683.OFC (1).pdf

    Dear Jack,

     As per your request  again i am sharing the pdf  and the block diagram which is shared earlier was not related to this, by mistake i have shared it please ignore the block diagram .I also shared the oscilloscope signal picture please check it.

    regards,

    Venkat.

  • 0 in reply to venkat subramanyam Bavitishetty
    TI__Intellectual 2250 points

    Venkat,

    The schematic you shared in your last comment looks identical to the original one in your post. Have you made changes to it based on previous recommendations?

    Please implement biasing resistors and termination as recommended in this picture. Vterm will come from the Vbb output of the SN65ELT21.

    If this does not help, please include high quality oscilloscope shots from both receiver inputs (D, D_n) and output (Q). I cannot make out much detail from the one you posted.

    Regards,

    Jack