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Original question:

TCAN1145-Q1: tINACTIVE time configuration

TCAN1145-Q1: PWRON flag set condition

Punith Chandra
Prodigy 110 points

Part Number: TCAN1145-Q1

Tool/software:

Hi Team,

As I see in the manual, the PWRON is set when the device is powered on from battery, also when the power on reset POR is triggered.

Does this flag also set when the UVsup event take place? 

Regards,

Punith Chandra

  • 0
    TI__Mastermind 30920 points

    Hi Punith,

    If there's a UVSUP event happens, the PWRON will set after VSUP recovered (higher than UVSUPR) as it is considered same as initial power on.

    Regards,

    Sean

  • 0 in reply to Sean Guo
    Prodigy 110 points

    Hi Sean,

    I observed a behavior. When the VSUP is around 4.75 volts, we couldn't read the device registers and when the VSUP is kept above 5V, the UVSUP flag was getting set and not the PWRON. When the similar test is executed while keeping the VSUP to below 3.7 and raising it above 5V, the PWRON flag is set.

    The range mentioned in the manual is between 3.75 to 4.4V. What are the exact range for the UVSUP to set and PWRON to set?

    Regards,

    Punith Chandra

  • 0 in reply to Punith Chandra
    TI__Mastermind 30920 points

    Hi Punith,

    Do you mean SPI interface is disabled at VSUP = 4.75V? This is already within the recommended operation condition, what is the VIO voltage at that point? It also doesn't make sense to me why UVSUP flag would set when VSUP is 5V, can you provide a detail test procedure? 

    3.75 to 4.4V is the recovery range of UVSUP when there is a under voltage event happened but not dropped below the POR threshold and then VSUP is recovering. To make PWRON set, VSUP need to drop more below the under voltage detection threshold UVSUPF, once VSUP is back it is considered as a poweron so the PWRON flag is set.

    Regards,

    Sean

  • 0 in reply to Sean Guo
    Prodigy 110 points

    Hi Sean,

    VIO and VCC are driven by external PMIC in our schematics. So, even when the transceiver is in sleep mode, VIO is still available.

    Below are the steps I performed.

    1. Connect 12V VSUP from battery.

    2. From MCU, read the interrupt register continuously using SPI interface in a task.

    3. Gradually reduce the VSUP.

    4. When the voltage reached around 4.7 volts, the read values from interrupt registers are all 1s.

    5. Increase the voltage to above 5V. At this point, we could read the interrupt registers and UVSUP flag is set.

    6. Repeat step #4 but bring the voltage down to 3.6V. The read values from interrupt registers are all 1s.

    7. Increase the voltage to above 5V. At this point, we could read the interrupt registers and PWRON flag is set.

    Also, one more related question to PWRON flag. Since this flag will also be set when reset is triggered via DEVICE_RST.HD_RST flag, is there any way to differentiate whether PWRON flag in set because of battery disconnect and connected ON (power ON from battery) or power ON after the reset is triggered via register write.

    There is a scenario where the customer wants to trigger the reset of the transceiver via register write, however in the next time it is back to standby mode they want to differentiate between the actual power on because of battery or it is because of the reset register write.

    Regards,

    Punith Chandra

  • 0 in reply to Punith Chandra
    Prodigy 110 points

    Hi

    Any update on this?

    Regards,

    Punith Chandra

  • +1 in reply to Punith Chandra
    TI__Guru 53535 points

    Hi Punith,

    The UVsup flag references the undervoltage threshold defined by the Supply under voltage detection and recovery UVSUPF and UVSUPR thresholds. By contrast the PWRON flag is reset when the Supply off/on detection threshold VSUP(UP)R/F is crossed by the supply. This is the difference you are seeing in your test when Vsup falls below 3.9V (max value of Supply on detection). 

    Unfortunately there is not a way to determine the difference between a POR caused by a battery reconnect or a hard reset via a register write. Both of these reset methods impact the state machine in the same way (by design) so all register values will be identical between reset conditions. 

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Prodigy 110 points

    Hi Eric,

    A follow up question on the same observation related to SPI.

    When the voltage is in the range of UVSUP event (< 4.7 Volt), the SPI read value from the register is all 1's. VIO and VCC are still connected and is available even when UVSUP event occurred. When the voltage is recovered above 4.9V, we could read the correct values from the registers via SPI.

    Is this expected behavior where SPI register read will return all 1's whenever the device is in UVSUP event condition? If yes, what are the other scenarios where the register read would return all 1's?

    Regards,

    Punith Chandra

  • +1 in reply to Punith Chandra
    TI__Mastermind 30920 points

    Hi Punith,

    During UVSUP, the IOs are all disabled, which means the SPI communication is not possible. Thus when your are trying to read a register value the SDO won't output anything, your MCU may just read back "FF"

    Regards,

    Sean