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DS90UB948-Q1: Reading ID 948 from terminal 941 is wrong.

Part Number: DS90UB948-Q1
Other Parts Discussed in Thread: ALP

Tool/software:

Hi team,

Tier 1:PATEO

OEM: Dongfeng

The SOC is 6125. During the system startup phase, the screen ti948 chip is powered on. After the host ti941 is initialized, the 948 ID is obtained by reading the 0x06 register.
Currently, there is a problem that there is a probability of reading the wrong 948 ID by reading the 941 0x06 register. By adding log analysis, data anomalies caused by voltage anomalies and lock instability are eliminated.

The 7-bit address of screen 948 is 0x34, and the two error addresses read currently are 0x32 and 0x3f respectively.

If it is caused by abnormal communication between the adder and deserializer, I want to know the process of reading 941 0x06 abnormality, whether there is a security mechanism such as verification in the process of automatically obtaining the deserializer address after the adder and deserializer connection is established, and give an effective repair solution for this problem.

  • Hi Alan,

    Tier 1:PATEO

    OEM: Dongfeng

    Thanks for providing this information!

    During the system startup phase, the screen ti948 chip is powered on. After the host ti941 is initialized, the 948 ID is obtained by reading the 0x06 register.

    I would like to review the startup sequencing of the SER and DES devices, can you confirm that the DES is powered up after the 941 Serializer has started sending video data?

    • This is an additional recommendation made in the 9.2 Power Sequence section of the 948 data sheet, as prevents the 948 locking onto random signals, allowing for deterministic startup behavior.

    Additionally, if the power sequence recommendation above is followed, you may also check the link integrity between the SER and the DES by reading the local MAP analysis in ALP with a local I2C connection to the 948.

    Please let me know if you need any clarifications on the above!

    Best,

    Miguel