This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65DP149: TMDS Lane Swapping Issue & Signal Integrity Concerns

Part Number: SN65DP149

Tool/software:

Hello,

In our design, we added series capacitors to the DVI lanes to create AC-coupled TMDS signals, which are then converted to HDMI output using the SN65DP149. However, we noticed that in our schematic, Pair 2 is connected to Pair 0, and Pair 0 is connected to Pair 2 on the IC’s pinout.

We have already manufactured this board, and in the production output, we observed poor eye measurements and compatibility issues with some displays. We were able to make it work by adjusting the EQ settings. Our current configuration is:

  • I2C_EN/PIN → Low
  • Pre_sel → Open
  • EQ_SEL → Open
  • HDMI_SEL → Low
  • SLEW_CTL → Open

Additionally, we sometimes observe a significant impedance drop on pins 21 and 22, and when this happens, the display does not show any image. The issue is only resolved when we replace the IC.

We are uncertain about the exact cause of these issues. Could the swapped lane connections be contributing to these problems? Do we need to update our schematic, or is it possible to continue with this design?

Thank you for your support!

  • Hi,

    Can you share the schematic for your board? I can review this to get a better idea of whether it will work or not.

    If you want to share this privately, you can accept my friendship request and use the direct message feature on E2E. This will create a separate space that is only viewable by you and I. 

    Best,

    Shane