Tool/software:
1.Application configuration, each slot is connected to each other by 3-way connector, slot nodes are connected to a maximum of 32, SN65MLVD206B chip is used to realize half-duplex transmitting and receiving mechanism, coding method adopts 8B10B coding mechanism, the model simplification diagrams are as follows:
2.Measuring the signal quality of slot1, slot15 and slot31 respectively, the amplitude of the signal at slot31 is severely attenuated, especially when a continuous high level (5 “1s”) is at a low level (“0”), the amplitude of the low level can not satisfy the threshold requirement of M-LVDS.
3.Try to modify the string group size and matching resistor size, the signal quality improvement are not ideal, try to increase the pull-down resistor at the terminals respectively for the checkpoint signal line A/B to SGND, the signal amplitude improvement is obvious, does M-LVDS support the application of increasing the pull-down resistor, and does it affect the life of the device? At the same time if not increase the pull-down resistor is there any other optimization measures? Looking forward to your answer, thanks!
