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DS32EL0421: FPGA-Link protocol description

Szymon Zakrent
Prodigy 10 points
Part Number: DS32EL0421

Tool/software:

Is there some description about the composition of FPGA-Link? Excluding scrambler and back channel is the bitstream just a raw packed data coming from LVDS channels without any additional data inserted?

I would like to use this IC to generate a packet emulating another interface so I'm looking for something that wont insert any additional data into output bitstream.

  • 0
    TI__Mastermind 36153 points

    Hi Szymon,

    Please see figure 6 in the data sheet.  I believe this will achieve what you are hoping to accomplish.  In order to minimize insertion of unexpected symbols, I'd recommend configuring the device such that DC-balance and scrambler are disabled.

    Thanks,

    Drew