Other Parts Discussed in Thread: TSER953,
Tool/software:
We are working on a USB-based system with a TI Serializer and Deserializer (SerDes) using FPD-Link. The system includes CX3 as the I2C master, communicating with an MCU over the SerDes link.
Issue Observed:
During I2C transactions, we observed bit loss and NACK issues depending on the clock speed and delay configuration. Below are the different methods we tested:
- I2C Clock = 400 kHz (CX3) without delay for each MCU transaction
- Issue: Bits were missing; for example, if we sent
0x01FF
, the serializer side received only0xFF
.
- Issue: Bits were missing; for example, if we sent
- I2C Clock = 100 kHz (CX3) without delay
- Issue: The serializer responded with NACK.
- I2C Clock = 100 kHz (CX3) with 280ms delay per MCU transaction
- Result: We received ACK, but required a significant delay for communication.
- I2C Clock = 100 kHz (CX3) + Fast-Plus Mode (SER/DES side, adjusted high/low time)
- Result: Communication worked without requiring delay for MCU transactions.
Questions:
- What could be the root cause of the bit loss and NACK issues in our initial tests?
- Is our final implementation (100 kHz CX3 + Fast-Plus I2C mode on SER/DES) a correct and stable solution?
Any insights or similar experiences would be helpful. Thanks in advance!