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TLIN1021A-Q1: SN1021-Q1 Short-circuit current maintenance time

Yunmiao Li
Prodigy 60 points
Part Number: TLIN1021A-Q1

Tool/software:

Hi,

  1.When TXD=0V VLIN=18V, what is the duration of the short circuit current (max.200mA)?  How much will the supply current increase? What is the duration?In addition, how does the chip state change after a short circuit?
     Does the LIN chip continuously send the dominant level (although the bus is forced to 18V) to the tTXD_DTO release the bus? Or is there some other mechanism to shorten the time of this failure (max.200mA bus current inflow)? If so, what is the duration of the failure (200mA bus current inflow)?

  2.For some LIN chips, if the CI 85V capacitor is directly coupled to the test, the chip will be damaged, so a 10Ω resistor in series is required to limit the current. If 85V direct capacitive coupling test is carried out on SN1021 chip, will it cause chip damage? In other words, is it necessary to have a 10Ω resistance in series on the LIN bus?

  3.Regarding False Wake Up Lockout, is this mechanism automatically activated when the chip enters sleep-mode with the bus holding the dominant level?

  4.As for the time to hold EN high to complete the wake up, is it tNOMINT? Or is it tmode_change? Or tNOMINT+tmode_change?

  

  

Best wishes

  • 0
    TI__Guru 50216 points

    Hi Yunmiao,

    1. Yes, when TXD is held low at 0 V, the device attempts to drive the LIN bus to a dominant state (low voltage). With 18 V applied to the LIN pin, a conflict is created for the significant current flow possibly up to the 200 mA max rating.

    • Duration: Note that the device is designed with thermal shutdown protection. If the excessive current causes the device's internal temperature to rise beyond the safe operating limits, the device will disable its' driver to prevent damage. Hence, the exact duration will be dependent on the ambient temp and heat dissipation. However, this is typically in the range of us to ms.
    • After the short circuit: After detecting the thermal fault, the device enters a protected state, disabling the LIN driver and will automatically attempt to resume normal operation after it cools down below the thermal shutdown threshold. Further note that, there are no additional mechanisms to limit the duration of the fault current. Hence, recommended to operate within the specified conditions to prevent conflicts.

    2. I would recommend to stay within the data sheet recommendations. I.e., note, the data sheet specifies that the device can handle direct capacitor coupling (DCC) tests up to 30 V and 85 V capacitive coupling test would exceed the rating and can potentially cause damage. Furthermore, series resistor is typical for reducing inrush currents during transient events.

    3. The feature is designed to prevent unintended wake-ups from sleep due to spurious signals on the LIN bus and automatically activated when the device enters sleep mode regardless of the bus state. If the bus is in a dominant state while the device transitions to sleep mode, the feature ensures the condition will not cause an immediate wake-up as the device will require a valid wake-up pattern to transition back to normal mode. Hence, filtering out false wake-up events.

    4. Yes, the total time to complete the wake-up process will be tNOMINT + tMODE_CHANGE, thanks.

    Best Regards,

    Michael.

  • 0 in reply to Michael Ikwuyum
    Prodigy 60 points

    Hi,Michael,

    1.

    Michael Ikwuyum said:
    1. Yes, when TXD is held low at 0 V, the device attempts to drive the LIN bus to a dominant state (low voltage). With 18 V applied to the LIN pin, a conflict is created for the significant current flow possibly up to the 200 mA max rating.

    So what is the maximum short-circuit current of the VSUP pin?

    2.

    Michael Ikwuyum said:
    3. The feature is designed to prevent unintended wake-ups from sleep due to spurious signals on the LIN bus and automatically activated when the device enters sleep mode regardless of the bus state. If the bus is in a dominant state while the device transitions to sleep mode, the feature ensures the condition will not cause an immediate wake-up as the device will require a valid wake-up pattern to transition back to normal mode. Hence, filtering out false wake-up events.

    Therefore, the REC voltage time (waveform in the red box) also needs to be longer than tclear before a successful wake up

    3.Since the LIN bus master node is pulled up to VSUP, does the LIN pin voltage change with the pulse waveform when the LIN chip is working properly, taking into account the power supply pulse test (ISO7637-2 pulse3b(max.150V))? If there is a change, is the LIN pin voltage equivalent according to the RC partial voltage, or is there another calculation method?
    (R:1K pull-up resistance, C: node capacitance)

    Best wishes

    Yunmiao Li

  • 0 in reply to Yunmiao Li
    TI__Guru 50216 points

    Hi Yunmiao,

    1. 200 mA.

    2. t-clear is the min required duration that the REC voltage must be held before the wake-up event is considered valid. To avoid glitches, the device waits for a valid LIN wake-up pattern before transitioning.

    3. The LIN pin voltage will be influenced by power supply transients and can change dependent on the R-C network and can be estimated using VLIN = VSUP * ( (Rpull-up) / ((Rpull-up + Impedance_of_the_LIN_node_Capacitance)) ). Note that, depending on designs with internal transient protections, results can differ from the divider model and recommended to validate transient behaviors on an actual PCB, thanks.

    Best Regards,

    Michael.