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DP83826E: Suggested EtherCAT Strap Configuration in SNLA344C App Note Violates Link Signal Polarity Requirement

Timothy Kutscha
Prodigy 20 points
Part Number: DP83826E

Tool/software:

Thanks for your excellent APP note on how to configure the DP83826 for EtherCAT applications.

We're currently connecting two of these PHYs to an Infineon XMC4800 chip.

In our design we followed all the strapping guidelines for Enhanced Mode in figure 3-1.

In this case, the PHY1_LED1 signal is strapped to GND.  This causes the LED polarity auto-detect circuit to configure this signal as active HIGH.

This signal is meant to be tied into the EtherCAT controller on the PHYx_LINKn signal which is active LOW.

In section 2 of your EtherCAT Specification Requirements and Recommendations, there are two requirements related to this:

The first requirement says that the signal should be active LOW.  The second requirement requires that the PHY be configured without the MII management interface.  If I follow the suggested strapping in figure 3-1, the LINK signal in the first requirement is driven active HIGH.

We had to re-spin the board to add an inverter for this LINKn signal.

I'd recommend adding an inverter to your Enhanced Mode Example (or at least a note pointing out the polarity) so that other designers don't encounter the same issue.

Thanks!

Tim Kutscha

Simplexity Product Development

  • +1
    TI__Mastermind 39855 points

    Hi Tim,

    Thanks for the note! I can look to take this back to the team that when this document is open for revisions, we can make a note for this. 

    While you are using an Infineon solution, the Beckhoff ET1100, which we see a lot of pairing with this device, has configuration for AH/AL polarity, so perhaps this is why this hadn't been brought up in the past.

    Sincerely,

    Gerome