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TCAN1145-Q1: the level state of the SPI interface after TCAN1145 sleep

Colt Zhang
Expert 5045 points
Part Number: TCAN1145-Q1

Tool/software:

hi expert,

Customer wants to know about the level state of the SPI interface after TCAN1145 sleep, customer is aware of the possibility of leakage current through the SPI interface in low power mode, wants to configure the MCU side to the same level state. Reduce power consumption.
Thank you!

  • 0
    TI__Guru 53575 points

    Hi Colt,

    The internal bias states of the SPI pins can be found in Figure 10-5 of the datasheet. All input pins have an internal pull-up to Vio. The SDO/nINT pin will be high impedance whenever the nCS pin is not asserted (high) so the bias from the MCU can be either high or low for nominal leakage. 

    Let me know if you have any more questions. 

    Regards, 
    Eric Schott