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DP83TC813R-Q1: Unable to Link-Up in Manual Mode

Part Number: DP83TC813R-Q1

Tool/software:

I am attempting to link-up using the following algorithm for PHY configuration. My PHY is strapped to manual mode in hardware. Code is under some cleanup, so going to instead provide the excerpts from the datasheet to explain what registers I am setting on bootup. This is an example of setting one of my ports to SLAVE mode.

followed by configuration of LED1 on PIN14 of the PHY. This is to use the CLK pin as a PHY status LED to indicate link-up and activity: 

// Configure LED1 on PIN14
MDIODrv_WriteExtRegister(phy_addr, 0x45F0x000F);
// Configure LED1 to blink on tx/rx activity
MDIODrv_WriteExtRegister(phy_addr, 0x4500x0111);
// Configure LED1 to be active HIGH
MDIODrv_WriteExtRegister(phy_addr, 0x4510x0009);
// Configure MUX to be LED1
MDIODrv_WriteExtRegister(phy_addr, 0x4520x0000);
After this configuration, I see my PHY LED is solid blue, which typically on my board indicates a link-up, however I see this LED even if I disconnect all devices and I am not able to ping my device regardless of the upstream node's master/slave configuration. This issue began only after the hardware was changed to strap manual mode. The contents of register 0x1F are 0x0000 when the link up is failing. This confirms we are in normal mode, and not in standby mode?
I am able to get around this by removing the PHY from managed mode by setting bit 0x18B[6] to ‘1’. Then, my PHY link and activity LED behaves normally and I can ping the device. However I would like to keep my PHY in managed mode and still be able to link-up. Is this possible with the given PHY hardware?
 
Let me know if you have any questions, thanks.
  • Hi Dharak,

    This behavior is expected.  Managed mode is recommended to prevent the link up process from initiating while software is configuring the phy.  Once configuration is complete, removing the phy from managed mode enables the link up.

    Also, from your description, the LED may have the wrong polarity, can you please check this on the schematics (Or provide to review)? 

    Regards,

    Undrea