Other Parts Discussed in Thread: TCAL6416R, TCAL6416
Tool/software:
Hello TI Experts,
We are facing an issue in our I2C master-slave communication setup and need guidance on whether the TCA4307 I2C buffer can resolve it.
System Overview:
- Master: ESP32-S3
- Slaves: STM32G0 Controllers (Multiple Slaves)
- I2C Bus Setup:
- Pull-up resistors: 4.7kΩ near the master (also tested with 2.2kΩ)
- Slaves are added one by one dynamically using a plug-and-play concept
- Default slave address: 0x01 (reassigned dynamically by the master)
Issue Faced:
- Initially, we connect Slave 1 (0x01) and later change its address to 0x60.
- We then add Slave 2 (0x01) and update its address to 0x61 for independent control.
- Problem occurs when adding the second slave (or subsequent ones):
- The SCL line gets pulled LOW continuously, causing the entire I2C bus to hang.
- This suggests that one of the slaves is clock-stretching indefinitely, preventing communication.
- A manual reset of one of the slaves restores communication, but adding a third slave causes the issue again.
Troubleshooting Done:
- Changed pull-up resistors from 4.7kΩ to 2.2kΩ → Issue remains
- Verified logic analyzer data → Clock line is being held LOW by one of the devices
- Suspected cause: Bus capacitance increase or unintended slave behavior during initialization
Possible Solution – Need Confirmation:
We found that TI’s TCA4307 I2C buffer has:
- Automatic clock and data recovery (prevents bus hang due to clock stretching)
- Capacitance isolation (reduces bus load when adding new slaves)
- Hot-swappable support (enables dynamic slave addition without disruption)
We would like to confirm:
- Will the TCA4307 resolve our issue with slaves pulling SCL low during plug-and-play operation?
- Do we need additional configurations when using TCA4307 for multiple STM32G0 slaves?
- Are there any alternate TI solutions better suited for this scenario?
We appreciate any insights or recommendations on how to resolve this issue efficiently.
Thank you in advance for your support!