Tool/software:
Hi
I know that the back channel contains the CRC bits in the data packets. Are there any crc bits in the forward channel data packets?
If no, how the deserializer detect the error in the received data?
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Tool/software:
Hi
I know that the back channel contains the CRC bits in the data packets. Are there any crc bits in the forward channel data packets?
If no, how the deserializer detect the error in the received data?
Hello Nick,
Although there are CRC error counters on the Serializer (0x0A and 0x0B on the DS90UB949A for example), the DES side only has the capability to detect errors over the link per a certain threshold (that can be programmed). See the following register and bit description below for the DS90UB948-Q1:
LINK_ERROR_COUNT - Register Address 0x41
[4] LINK_ERROR_COUNT_ENABLE > Enable serial link data integrity error count
[3-0] LINK_ERROR_COUNT > Link error count threshold. Counter is pixel clock based. clk0, clk1 and DCA are monitored for link errors, if error count is enabled, deserializer loose lock once error count reaches threshold. If disabled deserializer lose lock with one error.
- - - - - - -
The UB948 has a Lock pin that indicates whether the link between the SER and DES is interrupted (Pin 1)
This can be programmed to detect valid video data throughput or link integrity to the control channel of the serializer - please see the register and bit descriptions below to choose between these functions for the Lock pin:
DUAL_RX_CTL - Register Address 0x34
[6] RX_LOCK_MODE > RX Lock Mode: Determines operating conditions for indication of RX_LOCK and generation of video data.
Please let me know if this error detection method is sufficient for the system, or if you have any further questions!
Best,
Miguel