Part Number: DP83822I
Tool/software:
Dear Team,
My customer is evaluating the DP83822I on their board. MII Mode is set by Bootstrap, AVD=VDDIO=3..3V power up and 25-MHz reference clock is inputted, however TX_CLK and RX_CLK are not outputted from the PHY to the MAC of Processor.
What are the possible factors for this phenomenon?
Best Regards,
Koshi Ninomiya
