Other Parts Discussed in Thread: DP83TD510E
Tool/software:
For an internship I am working on a SPE switch that supports multiple SPE interfaces, such as 10BASE-T1L, 100BASE-T1 and 1000BASE-T1.
For this I will use DP83TD510E, DP83TC812R and DP83TG720R.
I am only confused about the Master/Slave configuration.
With the DP83TD510E it is clear that the Master or Slave configuration can be set with the strap pin or the PMA_PMD_CTRL register (address = 0x1834).
This is a preference mode and 2 devices negotiate who becomes the Master.
Only when Force Master/Slave is set in the AN_ADV_1 register (address = 0x202), the configuration in PMA_PMD_CTRL is non-negotiable.
how is this handled with DP83TC812R and DP83TG720R?
They both have an equivalent register like PMA_PMD_CTRL, but do the PHY negotiate about this or is it forced?
