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TDP0604: DDC buffer ID for DP++ to HDMI 2.0 source

Part Number: TDP0604
Other Parts Discussed in Thread: TDP1204

Tool/software:

We have a TDP0604 on our board to use as a DP++ to HDMI adapter.  For the DP++ port to clock beyond 165MHz the Linux software wants to see a DDC Buffer ID at address 0x40 (7-bit) on the DDC bus.  We need to tell the s/w we can run HDMI 2.0 4K60 rates with our adapter.

I know about the 65DP159 which has the DDC buffer ID built in.  Is there a recommendation for a solution using the TDP0604?  We've tried spoofing the checks in s/w, but with little success.

Looking at the DP159 datasheet it gives a series of definitions for the DDC Buffer ID which have sub-addresses from 0x00 to 0x22.  I can only find definitions for sub-addresses 0-0x0f in the "VESA DisplayPort Dual-Mode Standard Version 1.1a".  Are the additional sub-addresses beyond 0x0f defined in a standard? If so, which one?

  • Hi Andrew,

    I have a few comments on your design below:

    1. The Linux software should not be looking for a DDC Buffer ID on address 0x40 of the DDC bus. This register address is used for HDMI2.1 link training and is not located on the TDP0604. For a description of HDMI DDC buffer addresses please see this TI Precision Labs video.

    2. HDMI2.0 4K60 would need a datarate of 12Gbps. The TDP0604 only supports up to 6Gbps. Consider using the TDP1204 for this application.

    3. The TDP0604 DDC buffer is designed to level shift the DDC lines between the source and sink. Let me check with our systems engineer on whether there is a built in buffer ID on this device. I'll aim to have this answer next week when he returns to the office.

    Are the additional sub-addresses beyond 0x0f defined in a standard? If so, which one?

    The VESA standard defines the following address space for Dual Mode DP cable adapters:

    In the DP159 datasheet, the addresses from 0x00 to 0x0F are the HDMI DDC Buffer ID codes.

    Addresses 0x10 through 0x1E are device-specific information and capabilities (Data rate, TMDS clock rate, Firmware revision, Hardware revision,...). These are all defined in the dual mode DisplayPort spec:

    Addresses 0x20 through 0x22 are feature controls for DP159. This aligns with the dual mode spec for these addresses.

    Best,

    Shane

  • Hi Andrew,

    After checking with our systems engineer I'd like to correct point #2 and answer point #3 here.

    2. 6Gbps would be ok for HDMI 4K @ 60fps. You can use the TDP0604 for this application.

    3. The TDP0604 does not have a built in Buffer ID. You will need to ignore the read of buffer ID and force HDMI output if using this part.

    Best,

    Shane