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DS90UB948-Q1: I2C arbitration bug

Part Number: DS90UB948-Q1

Tool/software:

Hi expert,

My customer found that in one case: soc use 947-948 remote I2C to send frame to MCU(MCU side), while MCU accidently go into controller mode and read the register of 948, there will be a chance the I2C bus between 948/MCU is pulled low and cannot work.

I see there is arbitration for multi controller application and will 948 pulled low the I2C bus forever in some case?

Thanks!

  • Hi Jass,

    Who is the tier 1 and OEM?

    Depending on the activity on the I2C bus, it is possible for the bus to get "locked up." Based on what you're describing, it sounds like a I2C write is being sent to the MCU at the same time the MCU is performing an I2C read. This will cause a conflict on the arbiter as the I2C protocol will not be able to distinguish between the two transactions. 

    Is the interpretation above of what the customer doing accurate? If possible, please provide a waveform of the I2C_SCL and I2C_SDA lines when the issue occurs.

    Best,

    Nikolas

  • Hi Nikolas,

    The OEM is SAIC, the tier-1 is Bitech(947), Hiway(948).

    You are correct, but this is not a 100% reproduced bug, we didn't get the waveform. We can support multi-controller from datasheet,  is the conflict you mentioned on 948 side or MCU side(since it is both controller/device.

    Thanks!

  • Hi Jass,

    Without a waveform, it is difficult to say whether this conflict is originating from the 948 DES side or MCU side. Depending on how often the issues happens, it may be useful to capture a waveform monitoring the I2C lines from both the controller side and host side.

    In any case, you are correct in that multi-controller operation is possible, but please note the restrictions detailed in Section 7.6.3. It is possible that the issue occurred due to one of the three listed conditions not being satisfied.

    Best,

    Nikolas