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DP83640: Sometimes, the LINK delay of the network port is too long during power-on, causing an error in reading the coefficient file of the acquisition board

ian wu
Intellectual 745 points
Part Number: DP83640

Tool/software:

hi Expert

When using PHY chip DP83640 to power on, we may encounter a long LINK delay of the network port. PHY chip DP83640 on the acquisition board is not connected to the main control board in time for more than 3 seconds (Note: it can be linked eventually), resulting in the problem that the entire system cannot read the coefficient file of the acquisition board.

Here is our schematic diagram

Note: ETH_RMII_CRS_DV, ETH_MDC, and ETH_MDIO all have no signals when they are powered on, and no signal is sent from the core board to the PHY chip. That is, the PHY chip needs to be configured automatically without the need for the core board to configure it.

The serial port displays the following information: When the board DAU1 LINK is powered on, you can see that the faulty board DAU1 Link times out, and the board coefficient file cannot be read.

For thsi question，could you help give me some advisers，Thanks a lot！

  • 0
    TI__Mastermind 39795 points

    Hello,

    Thank you for your query. One of our apps engineers will be shortly assigned to this thread and will be responding soon.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    TI__Guru**** 176811 points

    Hi,

    What PHY is on the acquisition board, is it another DP83640? 

    I noticed in your schematic that you have the TPTDP/M shorted to TPRDP/M, can you please remove the short and see it improves the link up timing?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 80 points

    Hi,

    Yes ,it is only DP83640 on the acquisition board.

    I checked the datasheet  of  DP83640 on Page 117, all the 4 nets of TPTDP/M and TPRDP/M, how can I remove the short? 

  • 0 in reply to ?? ?
    Prodigy 80 points

    all the 4 nets of TPTDP/M and TPRDP/M are shorted to VDD.

  • 0 in reply to ?? ?
    TI__Genius 12461 points

    Hi, 

    I apologize for the confusion.
    Could you change C258 and C259, which is the center tap of the magnetics to 0.1uF? According to your schematic, those are currently 2.2uF. Our recommendation is 0.1uF. 

    ian wu said:
    Note: ETH_RMII_CRS_DV, ETH_MDC, and ETH_MDIO all have no signals when they are powered on, and no signal is sent from the core board to the PHY chip. That is, the PHY chip needs to be configured automatically without the need for the core board to configure it.

    Note that MDC is needed for the hardware configuration latch-in. When does the MDC sent to the PHY after the power-up? 

    Best,
    J

  • 0 in reply to J
    Prodigy 80 points

    Hello,

    Thanks for your patient reply.

    I tried  change C258 and  C259 from 2.2uF to 0.1uF, the acquisition board was not connected to the main control board in time, No improvement has been made.

    But I removed the pull up resistors R140,R141,R142,R143, closed to PHY CHIP, the issue we encountered is solved .

    Is any risk if I removed the high up resistors R140,R141,R142,R143? The datasheet of DP83640 on Pagef 11 ,  the pull up resistors are not  a mandatory requirement.

  • 0 in reply to ?? ?
    Prodigy 80 points

    One more question, if I adjust the value of the pull up resistors R140,R141,R142,R143 from 51ohm to 20ohm, is there any risks ?

    Just now  I removed all the pull up resistors R140,R141,R142,R143, I tested the acquisition board with 3 different main control board, 1 main control board is OK,but remaining main control board is NOK. 

    I adjust the value from 51ohm to 20ohm, the issue we encountered is solved . I wanted to checked whether there is any other risk?

  • 0 in reply to ?? ?
    TI__Genius 12461 points

    Hi, 

    The team hasn't validated the resistor combination other than the datasheet's recommendation. Any deviation from the recommendation puts the customer responsible for the validation. 

    Please let me know if you have any other questions. 

    Best, 
    J

  • 0 in reply to J
    Prodigy 80 points

    Hello,

    We adjust the value the pull up resistors R140,R141,R142,R143 from 51ohm to 20ohm,  tested at the normal air temperature at 25℃，the issue we encountered seemed be OK . 

    But tested  at the normal air temperature at 70℃，the issue we encountered has reappeared. That means the machine communication connection between main control board and the acquisition board suddenly interrupted.

    Can you give some suggestions to resolve the issue we  encountered? By the way , we adjust the value of R140,R141,R142,R143, and the C258,C259, no improvement has been made.. We need test at both normal air temperature 25℃ and high air temperature 70℃.

  • 0 in reply to ?? ?
    TI__Guru**** 176811 points

    Hi,

    With R140,R141,R142,R143 at 49.9ohm, do you see this lone link time only with the acquisition board? Do you see this long link time if you connect to a PC? Can you also measure the output voltage on the MDI line at both 25C and 70C? And does this issue happen on all DP83460 boards?

    What is the tolerance on the resistance you are using?

    Also what is the resistor tolerance on R155? The Vref is used to calibrate the output voltage on the MDI line. 

    Thanks

    David  

  • 0 in reply to David (ASIC) Liu
    Prodigy 80 points
    David (ASIC) Liu said:
    Also what is the resistor tolerance on R155?

    The tolerance on R155 is 1%.

    David (ASIC) Liu said:
    And does this issue happen on all DP83460 boards?

    This issue can easily happen on one of  DP83640 boards , it almost happen every time when power on the DP83640 boards. But if Swap the IC DP83640 of good acquisition board and bad acquisition board, the easily happened bad acquisition board work normally every time.

     

    David (ASIC) Liu said:
    Can you also measure the output voltage on the MDI line at both 25C and 70C?

    Yes ,we will check this voltage. By the way, this MDI line is connected to FPGA, and no square wave signal from FPGA at all.

    David (ASIC) Liu said:
    Do you see this long link time if you connect to a PC?

    No ,this can not be implemented， because  network  is connected to main control board by backplane bord, without RJ45.

    David (ASIC) Liu said:
    With R140,R141,R142,R143 at 49.9ohm, do you see this lone link time only with the acquisition board?

    The link time is about 2 seconds. This time is not  very precise, it is from Serial port,   but if  DP83640 board can not be linked in time, the board coefficient file cannot be read by the main control board.

  • 0 in reply to ?? ?
    TI__Guru**** 176811 points

    Hi,

    Since this issue only happening on one of the DP83460 boards and the issue following that particular DP83460, you may have a bad DP83460. If you like, can you please work with our field office to have that unit submitted for FA?

    Thanks

    David