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DS90UB935-Q1: Query on 0x52 General Status Register bit 5 (reserved)

Part Number: DS90UB935-Q1


Tool/software:

Hi,

We are experiencing a loss of video. It happens randomly on one camera. The power up sequence was measured and a register dump was performed of the serializer on the same camera when its OK (streaming) and NOK (not streaming). We found NO abnormalities on the power up sequence. We've noticed difference on the register dumps. The general status register (0x52) bit5 was set. But, in the datasheet it is only reserved. Can we get more information of this bit? What is the behavior of the device when bit5 is set?

Below you can find the initial investigation on the serializer.

I hope you can shed more light on this.

Regards,

Serge

  • Hi Serge,

    In this case where streaming doesn't start the lack of I2C traffic is concerning. In both cases back channel CRC errors are detected, which indicates some issue with the back channel communication. Do you have any measurements of the FPD-Link channel on this pcb? Info such as TDR, S11, S21 would be helpful in understanding what could impact back channel signal integrity here.

    Best,

    Thomas

  • Hi Thomas,

    Thanks for your reply. Unfortunately,  we do not have the S11, S21 and TDR measurements on this particular camera. But, we did the ABA swap and the issue follows the chip. 

    Regards,

    Serge

  • Hi Sergio,

    Do you know what length the cable is here? Any chance we can try to change the cable between the camera & ECU to see if the pass through stability is improved? The best way to understand what's going on here would be to check the S21, S11, and TDR for the full channel between the serializer and deserializer however if that is not possible switching cable length can be used as a debug step.

    Best,

    Thomas