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SN65LVDS19: LVDS Buffer Q Output Pin usecase

Garima Dubey
Prodigy 150 points
Part Number: SN65LVDS19
Other Parts Discussed in Thread: SN65LVDS18

Tool/software:

Hello TI Team, 

We are using SN65LVDS19 buffer in our design for isolation on LVDS interface with our host FPGA. 

We have the query on use-case of Q pin in the IC. 

It seems from datasheet the Q is output signal when GC pin is used in SN65LVDS18, but for SN65LVDS19 the use-case seems not making sense as it is just a output pin, could we keep it as open/ unconnected? 

Please confirm if its not adding any stub on our high speed line. 

  • 0
    Guru 316690 points

    For both '18 and '19, the /Q pin as an output. On the '18, you can adjust the output voltage with the GC input; on the '19, it always uses the default voltage.

    I do not know what /Q would be useful for; probably monitoring the signal during debugging. Anyway, you can leave it open, or add a test point. It is buffered, so there is no stub.