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DP83848K: Application Note of Ethernet Compliance Testing

Part Number: DP83848K


Tool/software:

Dear Team,

My customer reqquests the Application Note of Ethernet compliance testing of the DP83848K like as "How to Configure DP8386x for Ethernet Compliance Testing".
Do you have the same kind of Application Note of the DP83848K?

 - DP83848K
 - 100Base-TX Compliance Test

Since they need to do Compliance Test, can you please provide us the register setting of the DP83848K for 100Base-TX Compliance Test?

Best Regards,

Koshi Ninomiya

  • Hi Ninomiya-san, 

    Unfortunately, we do not have same kind of application note for 83848K, but the flow/logic of the scripts should be roughly the same as 86x compliance application note. You would have to potentially change which registers to write and what value to write to those registers. However, keep in mind that the DP83848 does not support 10Base-Te (only supports 10Base-T) and does not support analog loopback.

    As for the loopback and BIST scripts, the DP83848 supports BIST and only MII loopback (DP83848 does not support analog or reverse loopback).

    The register configurations needed to enable these features will be different for the DP83848, so you can refer to the datasheet on how to enable them.

    Please let me know if you have any other questions. 

    Best,
    J


  • Hi J-san,

    Please tell me about this specific register setting for the DP83848K.

    Similar devices send pseudo-random signals continuously and enter the 100Base-TX test mode by setting the following registers.
    Except for the return loss test, they are aware that this setting is sufficient.

    DP8386x (SLNA239C.PFD
    Reg 0x1F = 0x8000 //Reset PHY
    Reg 0x0 = 0x2100 //Programs DUT to 100Base-TX Mode
    Reg 0x10 = 0x5008 //Programs DUT to Forced MDI or MDIX mode (0x5028)
    Reg 0x1F = 0x4000 //Restart PHY

    DP8382x (SLNA266A.PDF
    Reg 0x1F = 0x8000 //Reset PHY
    Reg 0x0 = 0x2100 //Program DUT to force speed 100BASE-TX mode
    Reg 0x19 = 0x21 //Program DUT to Forced MDI mode. Set to 4021 for MDIX modeReg 0x1F = 0x4000 //Restart PHY
     * They think “Reg 0x19 = 0x21” is a misspelled document.

    However, they are not sure what the DP83848K equivalent is.

    For example, according to the DP8386x data sheet:
    0x1F bit15 SW_reset
    0x1F bit14 SW_restart

    The DP83848K does not have a corresponding control bit.
    The 0x1F address is reserved.
    Can these be substituted by the followings?
    0x00 bit15 Reset
    0x00 bit09 Restart Auto-Negotiation

    Please confirm the bits that can be substituted for other control bits.

    Best Regards,

    Koshi Ninomiya

  • Hi Ninomiya-san,

    Can these be substituted by the followings?
    0x00 bit15 Reset
    0x00 bit09 Restart Auto-Negotiation

    These settings are not the good substitute as this would put the PHY into the factory reset. 

    I would suggest not to restart the PHY as the device should be in test mode with the above setting. 

    I recommend to follow 82x compliance application note and make sure to turn auto-negotiation setting off and force into MDI to ensure the most consistent compliance test result. 

    Please let me know if you have more questions.