DP83825I: Output waveform is not generated

Hayashi-san

For compliance testing, please see this app note, https://www.ti.com/lit/an/snla266b/snla266b.pdf. 

Since COMPT_Register is an extended register, are they following the extended register read and write procedure? 

Can you please share a diagram of their power up sequence? They must meet the DP83825 power-up timing requirement, otherwise the device operation is not guaranteed.

Thanks

David

Hi David,

I’m Kurumi, AFAE in Japan and I’m taking over this account from Hayashi-san.

For the extended register read and write procedure, does it mean we need to follow those 4steps before “Disable auto-negotiation : BMCR_Register bit12 0x0”?

For the power up sequence, they use same 3.3V for AVDD and VDDIO. Would it be a problem?

Also, there is a possibility that the 3.3V line being too fast, 0.27ms voltage ramp duration. The 3.3V is from PMIC, which the customer cannot change the setting. So I believe we need external circuit to make it slow. What would be the possible option? Using RC filter? Do you happened to know other method?

Best regards,

Kurumi

Kurumi-san

Please see my response below

For the extended register read and write procedure, does it mean we need to follow those 4steps before “Disable auto-negotiation : BMCR_Register bit12 0x0”?

Please see the script below. The 4 steps are to write to register 0x27, so you want to do it after the write to register 0x1F and 0x0.

For the power up sequence, they use same 3.3V for AVDD and VDDIO. Would it be a problem?

No, but I want to make sure they are meeting the DP83825 power up sequence as shown below.

Thanks

David 

Hi David,

Thank you so much for your additional explanation on extended register. The customer confirmed the signal communication working correctly.

For supply sequence, I believe that using same 3.3V for AVDD and VDDIO is fine. But the voltage ramp duration should be within the datasheet spec which is 0.5ms. It seems the 3.3V line is now have ramp duration of 0.27ms. As mentioned, the duration is from PMIC setting which the customer cannot change. I asked them to add RC filter, but that is not acceptable, either. Do you know any other possible way to achieve 0.5ms duration?

Best regards,

Kurumi

Hi Kurumi,

David is on travel so I'll help to support this thread. Can you check that the customer is following the power supply decoupling recommendations for DP83825 in their design?

Adding capacitance to the power line can help to increase the ramp duration.

Best,

Shane

Hi Shane,

Thank you for your reply.

Yes they are using decoupling cap already, and it is still 0.27ms.

Best regards,

Kurumi

Hi Shane,

Understood, thank you for your comments.

Best regards,

Kurumi