This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83869HM: Concerns related to the communication mode change

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869, DP83869EVM

Tool/software:

I have 3 questions regarding the design of the DP83869HMRGZ.

1.Due to the requirements of the connected system, we need to change the communication mode from SGMII to Copper to 1000Base-X to 1000Base-T.
In the current SGMII configuration, AC-coupling capacitors are installed on the SIN, SIP, SOP, and SON lines.
When switching to the 1000Base-X to 1000Base-T mode, is it necessary to remove these capacitors?

2.Also, I apologize for the broad nature of the question, but as we are considering modifying the attached schematic to support the 1000Base-X to 1000Base-T mode,
please let us know if there are any additional changes required. (We are not planning to change auto-negotiation settings, so we are not considering switching the LED pins.)

  • Changing RX_D3 to Low

  • Connecting JTAG_TDI to the SFP_RX_LOS pin of the SFP connector (J4)

3.Regarding the JTAG_TDI pin, the DP83869 Schematic Design Review Checklist you previously provided states that no connection is required.
However, on your company's evaluation board(DP83869EVM), it is connected with a pull-down to GND.

In this case, is a pull-down resistor necessary?

schematic

We appreciate your support and thank you in advance.

  • Hi Ito-san,

    When switching to the 1000Base-X to 1000Base-T mode, is it necessary to remove these capacitors?

    This is not required. For the SIN/SIP/SOP/SON pin connections between 1000Base-X and SGMII, AC-coupling is recommended.

    please let us know if there are any additional changes required. (We are not planning to change auto-negotiation settings, so we are not considering switching the LED pins.)

    I do not see any other changes required - RX_D3 low and JTAG_TDI connection to SFP is sufficient. One concern I noticed was MDC/MDIO - I do not see a connection to a Host controller here. Is register access required or planned? This is recommended for diagnostics and debug feature access.

    3.Regarding the JTAG_TDI pin, the DP83869 Schematic Design Review Checklist you previously provided states that no connection is required.
    However, on your company's evaluation board(DP83869EVM), it is connected with a pull-down to GND.

    From my understanding, this PD on JTAG_TDI/SD may be required in 1000Base-X to 1000Base-T mode. Signal Detect pin is active-high, so a pull-down can help ensure default state is low when no signal is present.

    It's unclear to me if the SFP module used will pull this down internally in default case. Please confirm this to understand if external PD is required.

    Thank you,
    Evan

  • Thank you for your detailed response, Mayhew.

    1. I understand your explanation, and I’ve decided to keep the capacitor as is.

    2. Regarding this point, we had left the MDC/MDIO lines unconnected since we don’t access the registers in the product’s circuit. However, for this investigation into mode switching, it turned out to be inconvenient, so as you suggested, we are considering connecting them.

    3. Apologies—I had mistaken the pin name here. As you correctly pointed out, the TDI pin is used in 1000Base-X to 1000Base-T mode, so we will connect it.

    Best regards,
    KAZUKI

    • Additionally, please tell me about the handling of the JTAG_CLK pin.

      If it is unused, is it acceptable to leave it open?

    Best regards,
    KAZUKI

  • Hi Ito-san,

    Yes, this may be left open if neither JTAG_CLK or TX_ER functions are being used.

    Thank you,
    Evan