Tool/software:
Hello,
We are considering using a SerDes topology in a design to reduce inter-board signals between PCBAs. We are targeting the DS92LV1x component, and our source signals are mainly binary without heavy timing constraints.
Our design includes UART communication between PCBAs. We would like to estimate if we can embed UART communication within our LVDS link provided by the SerDes between our PCBAs. If yes, what is the maximal speed of UART versus TCK and REFCK of the DS92LV1x component?
To clarify my question, here is a simple text schematic:
UART PCBA #1: RX <- <- TX
TX -> [DS92LV1x] 
[DS92LV1x] -> RX : UART PCBA #2
Is this possible? What is the maximal speed of UART I can achieve for a 50 MHz SerDes clock?
