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Original question:

DS280DF810: Swapping between N/P pairs

DS280DF810: Not receiving packets on ports connected to channel 2 and 6.

Sridhar Babu A
Prodigy 20 points
Part Number: DS280DF810

Tool/software:

Not receiving packets on ports connected to channel 2 and 6.

Transmit Retimer channels 0,2,4,6 inputs are from Broadcom switch . Output channels 0,2,4,6 are connected to SFP+ connectors. On the connector side, output side channels 2,6 ports _P & _N are swapped at connector side (within port only). 

We are inverting the polarity using the code below

Code Invert Polarity based on Table 7-15. Invert the Polarity of the Output Data

UInt32 val3 = 0,val1 = 0, val2 = 0;
ReTimerDev[3]->set32(0xFC, 0x20);
usleep(1000);
ReTimerDev[3]->set32(0x3D, 0x80);
usleep(1000000);
ReTimerDev[3]->get32(0x3D, val1);
usleep(1000);
ReTimerDev[3]->get32(0x3E, val2);
usleep(1000);
ReTimerDev[3]->get32(0x3F, val3);
LOG(THIS_BLOCK<<"Prashant K Before inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
usleep(1000000);
val1 ^= (1 << 6);
val2 ^= (1 << 6);
val3 ^= (1 << 6);
LOG(THIS_BLOCK<<"Prashant K after inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
ReTimerDev[3]->set32(0x3D, val1);
usleep(1000000);
ReTimerDev[3]->set32(0x3E, val2);
usleep(1000000);
ReTimerDev[3]->set32(0x3F, val3);
usleep(1000000);
LOG(THIS_BLOCK<<" val1 "<<val1 << " val2 " << val2 << " val3 " << val3);

val1 = 0;
val2 = 0;
val3 = 0;

ReTimerDev[3]->set32(0xFC, 0x80);
usleep(1000);
ReTimerDev[3]->set32(0x3D, 0x80);
usleep(1000000);
ReTimerDev[3]->get32(0x3D, val1);
usleep(1000);
ReTimerDev[3]->get32(0x3E, val2);
usleep(1000);
ReTimerDev[3]->get32(0x3F, val3);
usleep(1000);
LOG(THIS_BLOCK<<"Prashant K Before inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
val1 ^= (1 << 6);
val2 ^= (1 << 6);
val3 ^= (1 << 6);
LOG(THIS_BLOCK<<"Prashant K After inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
ReTimerDev[3]->set32(0x3D, val1);
usleep(1000000);
ReTimerDev[3]->set32(0x3E, val2);
usleep(1000000);
ReTimerDev[3]->set32(0x3F, val3);
usleep(1000000);
LOG(THIS_BLOCK<<" val1 "<<val1 << " val2 " << val2 << " val3 " << val3);

Is there any issue with the code, with this code ports connected to channel 2 and 6 started working but ports  5 and 6 stopped working.

  • 0
    TI__Mastermind 20901 points

    Hello Sridhar,

    Thank you for posting your inquiry on the DS280DF810.

    An engineer has been assigned to this inquiry and will aim to provide you feedback by the end of day tomorrow, US Pacific time.

    In the meantime, could you please clarify the below statement:

    Sridhar Babu A said:
    with this code ports connected to channel 2 and 6 started working but ports  5 and 6 stopped working.
    • Which retimer channels are associated with ports 5 and 6 in your design? It is not clear based on the nomenclature used.

    Best,
    David

  • 0 in reply to David Waier
    Prodigy 20 points

    Hi David,

    Clarifying the above mentioned 

    Before inverting the polarity tx was not happening in ports 7 and 8.

    This is  port_to_tx_retimer_map  {/*channel num*/,/tx retimer num*/}

    {0,0},{4,0},{2,0},{6,0} for ports 5,6,7,8 respectively.

    channel 0 and 2 are associated with ports 5 and 6.

    As the actual issue is with port 7 and 8,

    we tried fixing the same with the below code

    {
    //ReTimerDev[0]->get32(0xFC, val);
    //val |=(1<<2);
    ReTimerDev[0]->set32(0xFC, 0x4);
    usleep(1000);
    ReTimerDev[0]->set32(0x3D, 0x80);
    usleep(1000000);
    ReTimerDev[0]->get32(0x3D, val1);
    usleep(1000);
    ReTimerDev[0]->get32(0x3E, val2);
    usleep(1000);
    ReTimerDev[0]->get32(0x3F, val3);
    LOG(THIS_BLOCK<<"Prashant K Before inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
    usleep(1000000);
    val1 ^= (1 << 6);
    val2 ^= (1 << 6);
    val3 ^= (1 << 6);
    LOG(THIS_BLOCK<<"Prashant K after inverting val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
    ReTimerDev[0]->set32(0x3D, val1);
    usleep(1000000);
    ReTimerDev[0]->set32(0x3E, val2);
    usleep(1000000);
    ReTimerDev[0]->set32(0x3F, val3);
    usleep(1000000);
    ReTimerDev[0]->set32(0xFC, 0x00);
    usleep(1000);
    LOG(THIS_BLOCK<<" val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
    }

    val = 0;
    val1 = 0;
    val2 = 0;
    val3 = 0;

    if(port == 8){

    //ReTimerDev[0]->get32(0xFC, val);
    //val |=(1<<2);
    ReTimerDev[0]->set32(0xFC, 0x40);
    usleep(1000);
    ReTimerDev[0]->set32(0x3D, 0x80);
    usleep(1000000);
    ReTimerDev[0]->get32(0x3D, val1);
    usleep(1000);
    ReTimerDev[0]->get32(0x3E, val2);
    usleep(1000);
    ReTimerDev[0]->get32(0x3F, val3);
    usleep(1000);

    val1 ^= (1 << 6);
    val2 ^= (1 << 6);
    val3 ^= (1 << 6);

    ReTimerDev[0]->set32(0x3D, val1);
    usleep(1000000);
    ReTimerDev[0]->set32(0x3E, val2);
    usleep(1000000);
    ReTimerDev[0]->set32(0x3F, val3);
    usleep(1000000);
    ReTimerDev[0]->set32(0xFC, 0x00);
    usleep(1000);
    LOG(THIS_BLOCK<<" val1 "<<val1 << " val2 " << val2 << " val3 " << val3);
    }

    we have a code which reads all the 4 channels on retimer0, 

    Before inverting polarity port 7
    Retimer[0] Channel 0 Reg 3D 4294967066 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 2 Reg 3D 4294967066 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 4 Reg 3D 4294967066 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 6 Reg 3D 4294967066 Reg 3E 4294967104 Reg 3F 4294967104

    After inverting polar =ity port 7
    Retimer[0] Channel 0 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 2 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 4 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 6 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040



    Before inverting polarity port 8
    Retimer[0] Channel 0 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 2 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 4 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040
    Retimer[0] Channel 6 Reg 3D 4294967232 Reg 3E 4294967040 Reg 3F 4294967040

    After inverting polarity port 8
    Retimer[0] Channel 0 Reg 3D 4294967232 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 2 Reg 3D 4294967232 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 4 Reg 3D 4294967232 Reg 3E 4294967104 Reg 3F 4294967104
    Retimer[0] Channel 6 Reg 3D 4294967232 Reg 3E 4294967104 Reg 3F 4294967104


    With this all the 4 channels associated with retimer0 is getting overwritten. Is there an issue with channel selection?

  • 0 in reply to Sridhar Babu A
    TI__Mastermind 35983 points

    Hi Sridhar,

    I'm looking into this and will get back to you shortly.

    Thanks,
    Drew

  • +1 in reply to Drew Miller1
    TI__Mastermind 35983 points

    Hi Sridhar,

    Apologies for the delay.

    There are a couple things I noticed based on your description.  My understanding is that you are trying to invert polarity on retimer channels 2 and 6.

    • Are you setting 0xFF = 0x01 before setting 0xFC?  This will ensure that you are not broadcasting writes and that you have the channel registers selected.
    • Register 0x3D did not change before/after polarity inversion on port 8.  This is strange, do you understand this?
    • I noticed you are setting 0x3D = 0x80.  This is a good set to enable the FIR pre/post cursor, but also zeros the main cursor value (0x3D[4:0]).  Do you set main cursor somewhere else?
    • Can you confirm that you are writing only 1 byte of data to the retimer registers when using the set32 function?  Want to ensure that this doesn't actually perform 4 register writes.

    Thanks,

    Drew

  • +1 in reply to Drew Miller1
    Prodigy 20 points

    Sorry for delayed reply.  by setting 0xFF =0x01 register, it solved the issue.

    Thanks you very much Drew..