SN65DSI83: Spread spectrum SSC MIPI DSI Clock

Hi Synlvain,

1. Note that 152.88MHz and 159.12MHz deviation is 6.24 MHz, which is actually 4%. The maximum frequency deviation supported on this device for SSC is 2%, which would be +/-1%.

You should also check that it is center-spread and the modulation frequency is between 30-60 kHz.


2. The DSI HS Clock can be up to 500 MHz. The DSI clock frequency range register 0x12 is to for the nominal main harmonic DSI clock frequency, 156 MHz in this case.
Please use the DSI Tuner tool to generate the initialization script, which will include the required register settings including reg 0x12.


3. I will check with the team and get back to you about whether SSC will have an effect on setting the 0x12 register range.

Best regards,
Ikram

Hi Ikram,

I found another post (https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1057828/sn65dsi83-q1-spread-spectrum-clocking-datasheet-spec ), which explains "2%" means "+/-2%", so  I chose a frequency deviation, of 6.24MHz (+/-2% of 156MHz).

Could you confirm the meaning of the max "2%" spread depth in the datasheet ? Does it mean "+/- 1%" from center frequency or +/- 2%?

Best Regards.

Sylvain

Hi Sylvain, please give till Tuesday to look into this with the team and get back to you. 

Best regards,
Ikram

Hi Sylvain,

Ikram Haque said:

1. Note that 152.88MHz and 159.12MHz deviation is 6.24 MHz, which is actually 4%. The maximum frequency deviation supported on this device for SSC is 2%, which would be +/-1%.

1. Please ignore my previous comment on this (above). Yes +/- 2% SSC deviation is supported, so 6.24MHz (+/-2% of 156MHz) will work with this device.

2. It is okay with the SSC frequency deviation, as long as the nominal frequency (156 MHz in this case) is within the clock range set in 0x12. 

Please test this is and check whether this is working. In some cases, you might need to set the frequency range higher for best performance. So please try with 155 - 160 MHz, and if there are issues, also try 160 - 165 MHz.

We will add this detail to next datasheet revisions.

Best regards,
Ikram

Hello Hikram.

Thank you for your reply.

In some cases, the screen is offset by a large number of lines, but there no error seen by the bridge (register 0xE5 :0x00). Even if I disable spread spectrum, the display remains shifted.

We have never seen this issue when the spread spectrum is disabled. => Spread spectrum is suspected....

Have you ever observed this problem with this bridge? Do you have any idea of the cause of the problem or how to determine it? (I've already checked the initialization sequence  of the bridge is satisfied)

Best Regards.

Sylvain

Hi Sylvain,

What is the frequency of the shifting screen issue? How many boards were tested, and how many show this issue?

Could you also try the 160 - 165 MHz setting on register 0x12, and see if this issue still occurs.

Is the SSC modulation frequency between 30-60 kHz?

Best regards,
Ikram

Hi Ikram,

Please find below the answers to your questions:

* There are problems with many spread spectrum configurations, but with we always use a 156MHz DSI CLK and a 52MHz LVDS clock.

* We have tested 4 cards and we have problems on all of them.
The  error rate is about 3-4%.

*We've tried 160-165Mhz (0x20 in register 0x12), but the problem persists.

Best Regards.

Sylvain