DS560DF410: PRBS Generator Clock Source

So, does the DS560DF series only support using the internal clock for all lanes?

Hi Chou,

Can you clarify what you mean by "internal clock"?  The DS560DF410 requires external data signal in order to use PRBS generator.

Thanks,

Drew

Internal clock’ means that the data clock output from the PRBS generator is not synchronized with the RX signal data clock; the TX data clock is generated internally by the chip.

Reference clock from lane<i>’ means that the TX<i> data clock output from the PRBS generator is synchronized with the RX<i> signal data clock through the recovered clock generated by the CDR.

If the DS560DF410 PRBS function is enabled or Custom pattern is enabled, what method is used to generate the PRBS pattern and custom pattern?

Hi Drew,

Is the custom pattern out also the reference clock from the lane?

Thanks,

Joseph