DS92LV2412: DS92LV2412 Lock Loss Issue at Low Temperature

Hi Conor,

How many of these units were produced and tested? And how many boards were found with this issue?

Is the flickering issue reproducible and occurring every time after power-up?

Have they done any ABA swaps already to check whether the issue is following the chips or boards?

The devices are Ser-Des pairs; how have the customer isolated that the issue is with the deserializer in particular?

If the issue is seen only with particular lots and it follows the device only, among a large number of units tested, then we could discuss with the quality team.

Best regards,
Ikram

Hi Ikram,

The customer followed the instructions in the "Related Questions" section and decoupled with beads and 22μF, 0.1μF, and 0.01μF, but the situation did not improve. Therefore, we believe that the unlocking of the defective product is part-specific and temperature-dependent.

We will answer your question.

Ikram Haque said:

How many of these units were produced and tested? And how many boards were found with this issue?

More than 10,000 units were produced in 2023, and two of them have flickering. The defect rate is 0.02%.

Ikram Haque said:

Is the flickering issue reproducible and occurring every time after power-up?

This occurs every time the power is turned on. It is highly reproducible.

Ikram Haque said:

Have they done any ABA swaps already to check whether the issue is following the chips or boards?

The problem can be improved by replacing the IC. Also, when the defective part is replaced with a different board, the flickering occurs again on the new board.

Ikram Haque said:

The devices are Ser-Des pairs; how have the customer isolated that the issue is with the deserializer in particular?

The serializer uses a DS92LV2411. The output signal of the DS92LV2411 was checked with an oscilloscope, and no problems such as jitter or insufficient amplitude were found. Changing the serializer did not improve the situation, and flickering occurs due to the deserializer.

Thanks,

Conor

Hi Conor,

1. If possible could you share the schematic of the DES, so we can check that all the necessary external components are added.

2. And what is the pixel clock rate they are running at? If they run at a higher or lower rate, is lock stable even under stress temperature conditions?

3. Also, if the power-up sequence correct? It's described in the "9.2.2.2 Power Up Requirements and PDB Pin" section.

4. When the flickering occurs is LOCK dropping temporarily and coming back? Could the customer please probe and share the waveform?

It would help if we could also check the jitter and other components in the path. It's possible that the external components (other converters and devices in the signal path) could be operating out of specification and causing SI issues, jitter. 

Best regards,
Ikram

Hi Ikram,

We have included information about your question in the attached Excel file, so please take a look.

DS92LV2412_20250509.xlsx

Changing the pixel clock frequency improved the lockout issue, so we believe this is due to the characteristics of the PLL phase compensation.

Thanks,

Conor

Thank you Conor. Please give me 1-2 days to look into this and get back to you.

Best regards,
Ikram 

Hi Ikram,

OK, we look forward to hearing from you.

Thanks,

Conor

Hi Conor,

I see that the customer mentioned that the system does not lose LOCK when they increase the frequency higher to ~12 MHz, instead of the nominal 6 MHz. It would help if we could check whether this is related to low frequency jitter. You mentioned that the customer checked for jitter, could you share those findings?

Also, what other devices are in this video signal chain? It would help to check whether those components/devices are within spec or if they have any effect.

Could you also please contact the quality team and we can get feedback from them if they have seen any similar issues with these parts.

Best regards,
Ikram

Hi Ikram,

Ikram Haque said:

 You mentioned that the customer checked for jitter, could you share those findings?

A. We attempted to measure the jitter, but the waveform disappeared when the temperature was lowered, so we were unable to perform the measurement. However, we did observe a slight shift in the timing under those conditions. Please see the Excel file below for details.

Ikram Haque said:

Also, what other devices are in this video signal chain? It would help to check whether those components/devices are within spec or if they have any effect.

A. The configuration is included in the attached file.

20250522_Inquiry.xlsx

If there are any suggestions or improvements that could be made through device settings, we would greatly appreciate your guidance. Additionally, regarding the PLL lock loss issue, we observed the following behavior when changing the output frequency:

1. CLKOUT = 12 MHz → No lock loss (even under low temperature)

2. CLKOUT = 8 MHz → No lock loss

3. CLKOUT = 6.86 MHz → No lock loss

4. CLKOUT = 6 MHz → Lock loss occurs

From this, we suspect there may be some threshold or behavior change between 6.86 MHz and 6 MHz that is affecting PLL lock stability.

Thanks,

Conor

Hi Conor,

1. From the diagrams you shared, it seems the deserializer PCLK output has some variation. That variations could be more than what's tolerated and be correlated to lock loss.

It would also help to check the jitter on the DES input at the RIN pins.

Can you also ask the customer to share how they measured jitter, including the bandwidth limits and what oscilloscope they used.

2. Can you also ask the customer to measure power supply noise for both SER and DES. The datasheet has a description for this. I am suggesting this because this issue is occurring at lower frequencies.


Best regards,
Ikram