DS125DF410: Temperature Dependency at Configuration

Hi Mike,

Is it possible to share your EEPROM configuration?

In general, one temperature dependent characteristic of the retimer is the temperature lock range (TLR).  This is the temperature delta that the retimer can experience while maintaining CDR lock.  For this device, it is 100C.  Based on the range of -30C to 50C, I would not expect TLR to be a limiting factor (assuming die temperature varies by ~80C).

When you disable/enable one end of your ethernet ports, you are likely causing the retimer to re-acquire CDR lock.

It would be interesting to see the device status in the case where the link stays up, but stops passing traffic.  Unfortunately, this may be challenging since connecting to SigCon seems to fix this.  It would be helpful to better understand what criteria would enable link up, but would stop traffic.  Are you losing all traffic?

Thanks,
Drew

The device is started from a powered down state at a definite -30C while unpowered.  I haven't determined temp rise yet, but assuming the die heats up greater than 20C while powered, we could see >100C on the TLR.  If this case were to occur, would the device attempt to relock CDR, or would it just maintain its initial values?

Hi Mike,

When the retimer loses CDR lock, it should attempt re-lock.

It's strange to me that lock is only re-acquired when sigcon is connected.

Thanks,

Drew

We have been successful by disabling and enabling the problematic port as it passes 0C.  We assume this begins the delta for the TLR again.  Can this TEMPlock be disabled in a register? I have included the current register configs.  Flash_file.xlsx

Hi Mike,

>> We assume this begins the delta for the TLR again.

Yes, you are correct.

>> Can this TEMPlock be disabled in a register?

No, this is inherent to the design of the CDR block and is related to the impact of temperature on VCO frequency.  This device does not have registers to alter the TLR.

>> I have included the current register configs

Related to your configuration, I see that you appear to be mapping register data to EEPROM addresses starting at EEPROM address 0.  Can you confirm that you are including a base header in your EEPROM?

This app note has more EEPROM details:

https://www.ti.com/lit/an/snla245/snla245.pdf

Thanks,

Drew

Thanks Drew,

Regarding the EEPROM we do have a header that I believe starts at 30.  

With respect to the TEMPlock feature, are there any components that have a wider range than 100C?

Hi Mike,

Mike Bernico said:

Regarding the EEPROM we do have a header that I believe starts at 30.  

In the EEPROM, there should be a base header for the first 3 bytes of the EEPROM.  This contains EEPROM configuration information (like common channel EN, CRC EN, address map header EN).

Mike Bernico said:

With respect to the TEMPlock feature, are there any components that have a wider range than 100C?

Our DS110DF111 and DS125DF111 have increased TLR.  These our 2 channel retimers.

You might also consider DS250DF410, which is a 4 channel 25G retimer.  It also supports 10G, but max CTLE gain will not be as high as 10G retimers.  How much insertion loss do you have?

Thanks,

Drew

Thanks again.  I believe our EEPROM is correct as all settings we are expecting show up correctly in SigConArchitect.  Is it possible to disable the TEMPlock altogether or modify anything on the DS125DF410 itself to change the range of the TEMPlock feature?