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DP83867IS: Unable to Ping lwIP Echo Server on Zynq UltraScale+ MPSoC with Fixed Link SGMII Configuration and DP83867ISRGZ PHY

Part Number: DP83867IS

Tool/software:

Hello,

I am currently developing an Ethernet-based application on a Zynq UltraScale+ MPSoC using Vivado 2024.2 and Vitis 2024.2. The system is configured as follows:

  • GEM0 to GEM3 enabled in the Zynq Processing System

  • GT lanes properly assigned

  • Bitstream successfully generated and hardware exported

  • Vitis platform and application created using the exported XSA

The application is based on the lwIP Echo Server template. On boot, the UART console confirms successful application execution and TCP echo server startup. A static IP (192.168.1.10) is assigned to the board.

I am using the TI DP83867ISRGZ Ethernet PHY, interfaced via SGMII. To address PHY negotiation issues, I enabled the sgmii_fixed_link option (set to true) in the lwIP library settings. After this change, the TCP server initializes properly and there are no PHY-related errors reported.

Console Output: 

Zynq MP First Stage Boot Loader
Release 2024.2 Apr 30 2025 - 12:44:26
PMU-FW is not running, certain applications may not be supported.

-----lwIP TCP echo server ------
TCP packets sent to port 6001 will be echoed back
Board IP: 192.168.1.10
Netmask : 255.255.255.0
Gateway : 192.168.1.1
TCP echo server started @ port 7

However, I am unable to ping the board from my host PC. Both the board and the host are on the same subnet. TCP connections (e.g., using telnet on port 6001) are functional, but ICMP ping requests do not receive replies.

Could you please advise:

  • Are there any additional PHY register configurations needed for the DP83867ISRGZ when using SGMII fixed link mode?

  • Could any lwIP or MAC configuration be preventing ICMP from working while allowing TCP?

  • Are there known limitations in this setup for ping responses?

Any insights or suggestions would be highly appreciated.

Best regards,
Litesh

  • Hi Litesh,

    Could you provide us the register dump of the PHY from registers 0x00 to 0x1F? This way, we can isolate the issue to see if the connection to the PHY is the issue, or if the connection between the MAC and the PHY is the issue.

    Can you also see the LED of the Ethernet port lighting up for the link?

    To answer your question,

    Are there any additional PHY register configurations needed for the DP83867ISRGZ when using SGMII fixed link mode?

    If SGMII is in fixed link, the PHY has to have its SGMII auto-negotiation turned off.

    Could any lwIP or MAC configuration be preventing ICMP from working while allowing TCP?

    Not that I know of.

    Are there known limitations in this setup for ping responses?

    Not that I know of.

    Please let me know.

    Best,

    J