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DS90UB935-Q1: Bandwidth requirement for Video Aggregator

Rajj
Prodigy 110 points
Part Number: DS90UB935-Q1

Tool/software:

Team

I am using 3Mp camera with DS90UB935 serializer, configured to 600Mbps per lane with 4 Lanes enabled. De-serializer part TI-971 or similar video aggregator has limitation of MIPI CSI-2 with 800pbs/lane and 2 Lanes. 

Q1) Whether configuration works fine or any BW issue in video streaming?

Q2) Whether the serializer MIPI port overall data rate should match with De-serializer MIPI port overall data rate, irrespective of lane configuration or actual image data? i.e. serializer MIPI data rate over 4 lanes should be less than or equal to De-serializer MIPI data rate of 1600Mbps overall (800Mbps * 2 Lanes)? 

Thanks

  • 0
    TI__Mastermind 26630 points

    Hello,

    Thank you for reaching out. The 935 can support up to 2.528Gbps of CSI data bandwidth. This bandwidth is divided across the CSI lanes being used. For example, if the serializer is programmed to operate with one or two CSI lanes, each lane can support up to 832Mbps. If the serializer is programmed to operate with four CSI lanes, each lane can support 632Mbps. Since your camera's 600Mbps is within these limits, the 4 lane configuration is supported.

    The serializer and deserializer MIPI lane counts and speeds do not need to match. The serializer CSI receiver and the deserializer CSI transmitter are independent. As long as each device's individual bandwidth is met, the data stream can be transmitted without issue.

  • 0 in reply to Darrah Merillat
    Prodigy 110 points

    Q1) Need more clarity. Example: Serializer configured with 600Mbps/lane, 4 lanes, 2400Mbps throughput. Deserializer configured with 800Mbps/lane but using only 2 Lanes, 1600Mbps data throughput. Deserializer has to aggregate 4 video streams with same serializer configuration. Means, 4x 2400Mbps throughput of video data. Does it not make buffer overflow at deserializer and causes video loss?

    Q2) with higher lane speed and 4 lanes, the frame blanking time increases on the imager, serializer sends data quickly that deserializer cannot clear out immediately due to low-speed configuration on deserializer MIPI CSI port that too with 2 lanes. Though the data bandwidth is independent and met required BW on deserializer, does the deserializer handles this condition to avoid frame loss? 

    Q3) Please elaborate on device's individual bandwidth is met condition with simple example. Consider aggregator has to send 4 camera videos to the Host with 2 MIPI ports on deserializer using 2 ports each. Remaining 2 ports are used to duplicate the video to display.

  • 0 in reply to Rajj
    TI__Mastermind 26630 points

    Hello,

    The deserializer's output bandwidth is dependent on the device's configuration (ex: number of output CSI lanes, the output CSI speed, the number of cameras to be aggregated, etc.). The input bandwidth from the serializers plus the CSI overhead must be lower than the output bandwidth. If the input bandwidth of the serializers is greater than what the deserializer can output, then there will be buffer overflow.

    Due to the bandwidth being dependent on the system's configuration, there is not a standard number that can be used to determine if it is met or not. However, if you are aggregating 4 cameras, 2 lanes operating at 800Mbps is likely not enough bandwidth, and additional lanes and/or a faster speed will be needed. For more details and examples on calculating bandwidth please see section 7.4.20 of the DS90UB960 data sheet.