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DS160PR410: The recommended location for the DS160PR410 on the PCIE link

Yuxi Liu(Tony)
Expert 3120 points
Part Number: DS160PR410

Tool/software:

Hi TIer

Where is the DS160PR410 recommended on the PCIE link?

Are they near the transmitter, near the receiver, near the board connector end, or are they not explicitly required?

Our current layout design is to place the two DS160PR410 on the TX and RX links near the COME of the PC board and two more at the backplane near the connector, as shown in the box below, note the relative position of the capacitance. May I know if it is possible to put only one DS160PR410 at the transmission end, without the DS160PR410 reserved for the backplane? Or just place two DS160PR410 on the back panel, not on the PC board?

  • 0
    TI__Expert 3120 points

     I would like to add that the figure below is the figure 10 in the DS160PR410 specification book. From this simplified block diagram, the DS160PR410 with the transmit receive link is placed close to the Host. I would like to confirm that this is only a schematic or a design reference, because the capacitance in the red box is not placed near the connector from the device board as indicated in the guidelines, I tend to think that the block diagram is just for the sake of presentation, so it's all drawn together. You are therefore required to provide more detailed layout guidelines for the DS160PR410. Cheers

  • 0 in reply to Yuxi Liu(Tony)
    TI__Mastermind 18910 points

    Hi Yuxi,

    Yuxi Liu(Tony) said:

    Where is the DS160PR410 recommended on the PCIE link?

    Are they near the transmitter, near the receiver, near the board connector end, or are they not explicitly required?

    I am assuming you are talking about the placement of the redriver (integrated circuit). For a detailed explanation of redriver placement you can check section 4 of our redriver equalization application note: https://www.ti.com/lit/an/snla461/snla461.pdf

    Basically, it is preferred for a redriver to be placed in a way that it has more loss before its TX, compared to the loss after its RX because the equalization tends to work better this way.

    However this is not a requirement, in some systems the redriver has to be placed in the middle of the loss channel due to layout constraints but the performance is good anyway. Another factor I would mention is that it is better to avoid putting the redriver extremely close to connectors, to help prevent signal reflections from interfering with the redriver input/output.

    The part of the datasheet text you have circled is talking about the AC coupling capacitors for the PCIe lines. The placement of the AC coupling capacitors is a different case from the placement of the redriver, because the capacitors are separate components and they are not required to be close to the redriver. On our own EVMs we typically place the capacitors close to the connectors following the datasheet comments.

    The figure 10 diagram is not drawn to scale, but I believe from what I have written, the ideas for placement of the redriver and placement of the capacitors should be clear.

    Yuxi Liu(Tony) said:
    Our current layout design is to place the two DS160PR410 on the TX and RX links near the COME of the PC board and two more at the backplane near the connector, as shown in the box below, note the relative position of the capacitance. May I know if it is possible to put only one DS160PR410 at the transmission end, without the DS160PR410 reserved for the backplane? Or just place two DS160PR410 on the back panel, not on the PC board?

    I don't understand well from this text what the layout of your system is like. If you still would like an opinion on the redriver placement after understanding my explanation, a system block diagram showing how the different boards are arranged and where the signal paths are travelling would be helpful if you have one.

    Best,

    Evan Su

  • 0 in reply to Evan Su
    TI__Expert 3120 points

    Hi Evan

    1.The PCIE link runs approximately 8500mil on the PC Board, approximately 5000mil on the Backplane Board, and approximately 1400mil on the Function Board. Please suggest the placement of the redriver based on the block diagram and the length of the wire.


    If only one set of redrivers is kept, would it be better to put them on the PC Board or on the Backplane Board?

    If PC Board and Backplane Board are placed and enabled at the same time, would the performance of PCIE be improved or negatively impacted compared to a single set of redrivers?

  • 0 in reply to Yuxi Liu(Tony)
    TI__Mastermind 18910 points

    Hi Yuxi,

    Do I understand correctly that the signals are linked between 1-M and 1-F, and 2-F and 2-M this way from reading the net names?

    If that is the case and we install PC Board <---> Backplane Board <--->  Function Board at the same time, then the HOST --> CLIENT signal path has two redrivers on it in series, and the CLIENT --> HOST signal path also has two redrivers on it in series. This is called "cascading" and we do not recommend it because it is likely to cause signal quality problems and can be difficult to work with, see our E2E FAQ for more details. But maybe the customer already knows this and the block diagram is just showing the possible spots to put a redriver, I am not sure.

    When we only allow 1 redriver to be on the signal path for each direction, my opinion is that this layout would be the best option to evaluate first (I assume the function board is probably too small to fit a redriver):

    Exact location placement of redrivers on the PC board and backplane board, I will leave to the customer to pick because they need to see what is convenient on their board design. But again, for the redriver try to keep some distance away from connectors, and for AC coupling capacitors try to keep them closer to the connectors. Check in signal integrity simulations if anything is unclear.

    Best,

    Evan Su