Other Parts Discussed in Thread: ADC3683EVM, ADC3683, ADC3664, , ADC3668
Tool/software:
Dear TI Support Team,
I’m currently evaluating the ADC3683EVM and trying to integrate it with TSWDC155 reference design
While following the standard Python-based configuration flow (using adc3683evm.py
and adc3683_api.py
),
I encountered some issues related to EFUSE loading, memory export, and waveform visibility in HSDC Pro.
I’ve attempted several debugging steps and would like to share the symptoms, current setup, and specific questions for your guidance. Your help would be greatly appreciated.
-
What are possible root causes for intermittent efuse reload failure?
→ Could this relate to internal power/reset sequencing or timing issues? -
If manual bit mapping is applied after efuse reload, is it possible that
efuse re-overwrites bit mappings at a later point? -
When the message
Writing to memory failed
appears duringadc_export_to_memory()
,
→ What exact conditions (e.g., DDR mapping, buffer size, export config) should be validated? -
Does the TI-provided bitfile (
adc3664_bd_wrapper.bit
) already include DDR controller logic,
→ or do we need to instantiate and configure a MIG manually?
System Configuration
ADC: ADC3683EVM
-
Interface: 2-wire LVDS
-
Sampling rate: 40 MSPS
-
Resolution: 16-bit
-
Decimation Mode: Bypass (No DDC)
-
Python SDK: Provided by TI (adc3683evm.py / adc3683_api.py)
Issue Summary
Q1. After calling adc.config_output_mode()
, the subsequent efuse_reload()
call intermittently fails.
→ Sometimes the efuse_load_done
flag does not become 1 (completion not detected).
Q2. After calling adc.config_output_mode()
, the subsequent efuse_reload()
call intermittently fails.
→ Sometimes the efuse_load_done
flag does not become 1 (completion not detected).
Q3. The following error is seen in msps_server.py
output:
***Exporting data to memory
Writing to memory failed
Troubleshooting and Actions Taken
-
Added
time.sleep(1)
before callingefuse_reload()
to stabilize timing. -
Verified bit mapper address values are correctly written for DA0/DA1 channels.
-
Enabled toggle test pattern using: