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TCAN4550: Configuration issues with tcan rx Fifo

Part Number: TCAN4550

Tool/software:

Hi Ti team,

I would like to ask how many Rx0NumElements should be set appropriately in the configuration of TCAN4550, because I found that when it is configured to 32, the packet receiving rate can only run for a period of time when it is too fast, and then it cannot receive packets normally.

  • Hello Zhicheng,

    I found that when it is configured to 32, the packet receiving rate can only run for a period of time when it is too fast, and then it cannot receive packets normally.

    The number of RX FIFO elements will not help you when the packet receiving rate is "too fast.' 

    The fundamental issue is that you will not be able to receive a large number of CAN packets faster than you can read and acknowledge them through the SPI interface.  You will need to calculate or measure with a logic analyzer the time it takes your processor to receive, read, and acknowledge a CAN message through SPI to determine the maximum CAN message receive rate you can support without causing a RX FIFO Overflow.

    Increasing the RX FIFO just causes the device to store more CAN messages into the MRAM before the FIFO overflow event occurs.  But the point that needs to be understood is that the processor must be able to process the received CAN packets from the RX FIFO faster than it is receiving them.

    Regards,

    Jonathan