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DP83848C: Violate RMII Transmit timing requirement, is there any solution?

John11513
Expert 5720 points
Part Number: DP83848C

Tool/software:

Hi team,

My customer is testing DP83848C on their PCB. They found a problem: the RMII transmit timing of their MAC cannot meet the requirements of DP83848. The "TXD[1:0], TX_EN, Data setup to X1 rising time" is required 4ns minimum, however, this time from their MAC is 2ns to 3ns. Is there any solution?

Thank you!

John

  • 0
    TI__Expert 5720 points

    Some supplementary information: the DP83848C phy device and MAC both are clocked by a 50M XO source through separate buffer.

  • 0 in reply to John11513
    TI__Mastermind 30430 points

    Hi John,

    You're referring to T2.26.2 > 4ns correct?

    Can the MAC transmitters adjust the data/clk relative timing? If the MAC can present the data sooner, it would increase the setup time for our receivers.

    Unfortunately, there isn't much we can do from a PHY perspective on DP83848 as it is an older part. Are you able to switch to the newer DP83826A? DP83826A has an RMII TX Clock shift register to help account for Clk/data skew.

    Best,

    Shane