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SN65DPHY440SS: Clarification on SN65DPHY440SS Register Retention on Shared I2C Bus.

Part Number: SN65DPHY440SS
Other Parts Discussed in Thread: ADS1015

Tool/software:

Hello,

At MCU boot-up, we configure the SN65DPHY440SS retimer’s CSR registers using an I2C clock speed of 100 kHz. After this, we switch the I2C bus speed to 400 kHz to communicate with the ADS1015 ADC on the same bus.

We would like to confirm whether the retimer retains its configured register values after the I2C speed is increased, and if using devices with different I2C speeds on the same bus could cause any interference or unexpected behavior.

We would appreciate any guidance you can provide on this query.