Tool/software:
About TCA6424A
I have a question about the timing requirements of the I2C interface.
I would like to confirm the definition of tsp (I2C spike time).
Does it apply when the voltage level drops due to noise, causing SCL to fall below VIH (0.7 x VCCI)?
Also, spikes do not usually occur, right?
(It is desirable that spikes do not occur, right?)