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THVD2450V-EP: Consept Questions

Part Number: THVD2450V-EP
Other Parts Discussed in Thread: THVD2450V

Tool/software:

Hello, I am currently working on designing a system that comprises 7 subsystems. I intend to establish communication between these subsystems using RS485. They will be interconnected with 10-meter cables, resulting in a total bus length of approximately 70 meters. I have some questions regarding this system below. I would be very grateful if you could answer them.

Q1: I expect my data rate to be approximately 2 Mbps. According to the RS485 standard’s speed-distance curve, I am pushing the limits. I understand the importance of the cable. Assuming I use a special shielded twisted pair cable with 120 ohms characteristic impedance, can I achieve 2 Mbps over 70 meters using the THVD2450V transceiver?

Q2: This IC can be powered by either 3.3V or 5V. As I understand, the differential output voltage of the driver changes depending on the supply voltage. Considering all 7 subsystems in the system will have the same transceiver, does the supply voltage affect the achievable distance and data rate? Which voltage should I choose?

Q3: Besides establishing reliable communication, I also need to pass EMC-EMI tests. This IC has relatively fast rise and fall times, which can increase EMC problems. How can I reduce the rise-fall times without compromising system integrity? Or do you have any suggestions or key focus areas regarding EMC and EMI?

Q4: Independently of this application, sometimes the driver and receiver are implemented as separate ICs rather than integrated into one. What could be the advantages and disadvantages of using separate driver and receiver ICs?

Best regards

  • 1. From Signal Integrity vs. Transmission Rate and Cable Lengthfor RS-485 Transceivers:

    With a 230 ft cable, the jitter will be a few percent at most.

    2. A higher supply voltage allows a higher differential bus voltage, but this will probably not affect the jitter much.

    3. Inductors/ferrite beads can slow down edges. (And common-mode chokes will ensure that the edges on the two differential lines will cancel out each other.)

    4. What separate driver/receiver ICs do you want to use?

  • Q1: I expect my data rate to be approximately 2 Mbps. According to the RS485 standard’s speed-distance curve, I am pushing the limits. I understand the importance of the cable. Assuming I use a special shielded twisted pair cable with 120 ohms characteristic impedance, can I achieve 2 Mbps over 70 meters using the THVD2450V transceiver?

    70m is about 210 feet so based off this graph, I would say 2Mbps should get you pretty low jitter performance if you set up your bus correctly. Seems like you are also using a higher quality cable which we recommend when doing faster data rates. 

    Please note, with your in-between nodes, you should ideally tie them into the bus using a daisy chain connection. If daisy chain is not possible, next best thing is a junction box topology.

    Q2: This IC can be powered by either 3.3V or 5V. As I understand, the differential output voltage of the driver changes depending on the supply voltage. Considering all 7 subsystems in the system will have the same transceiver, does the supply voltage affect the achievable distance and data rate? Which voltage should I choose?

    5V will provide wider VoDs which helps for further distances. I would choose 5V.

    Q3: Besides establishing reliable communication, I also need to pass EMC-EMI tests. This IC has relatively fast rise and fall times, which can increase EMC problems. How can I reduce the rise-fall times without compromising system integrity? Or do you have any suggestions or key focus areas regarding EMC and EMI?

    You can look into using common mode chokes and split termination to help even out the common mode shifts during communication. 

    If the edge rate is too fast, you can technically slow it down by adding a capacitor inbetween the A/B pins. I wouldn't go too crazy with this and some of this may require trial and error. As you increase capacitance, the eye diagram at the receiver will become smaller so it can affect the distance and max data rate. You'll need to test to see what value will eventually break your communication vs. gives you best EMI performance. There will be some balance. Just make sure you include that cap between A/B you can experiment with it.

    Q4: Independently of this application, sometimes the driver and receiver are implemented as separate ICs rather than integrated into one. What could be the advantages and disadvantages of using separate driver and receiver ICs?

    In a general sense its basically just Board space/cost.

    Having seperate ICs can give you more control of design tweaks (maybe you want to place a line driver infront of the original driver to give you stronger drive strength but with it integrated, it would affect the receiver circuit so having them separate allows for more freedom in a design sense). Same idea with a receiver, maybe you want to add an equalizer circuit to gain the receiver input but it would interfere with the driver circuit since they are connected in an integrated solution. 

    If multiple channels then also skew differences which can matter more in timing (clock sync) applications. 

    Last thing I can think of is sourcing. Maybe the integrated solution is a unique device that has no other competitors in the market. If you need a second source (like many did during covid silicon shortage) then relying on the one of a kind integrated solution becomes a risk. Having a separate IC can make it easier for procurement to get better pricing if the separate IC solution has competitors in that space. 

    -Bobby