DP83TC813R-Q1: DP83TC813R-Q1 Register 0x2 value read 0xFFFF via MDIO lines

Prashanth Reddy

Part Number: DP83TC813R-Q1

Tool/software:

Hi TI team,

we are using DP83TC813R-Q1 with RMII Interface. Ethernet controller initialization was successful. Ethernet Transceiver initialization is failing because register PHYIDR1 Register (Address = 2h) value we are getting 0xFFFF.

we tried reading all register value and register value are responding with 0xFFFF Value.

Can you please guide us what might going wrong.

3 months ago

0 Drew Miller1 3 months ago

TI__Mastermind 36123 points

Hi Prashanth,

If all registers read back 0xFFFF, this suggests that PHY may be in reset or in TC10 sleep. Is TC10 sleep enabled in your system? If so, can you try pulling WAKE pin high? This will wake up the PHY if it is sleeping.

Thanks,

Drew

0 Prashanth Reddy 3 months ago in reply to Drew Miller1

Prodigy 10 points

Hi,

TC10 Sleep is not enabled, I see WAKE Pin is connected to VSLEEP and INH pin is floating.

0 Drew Miller1 2 months ago in reply to Prashanth Reddy

TI__Mastermind 36123 points

Hi Prashanth,

Thanks, we will review your schematics.

Thanks,

Drew

0 Prashanth Reddy 2 months ago

Prodigy 10 points

Hi,

I have shared over mail to you to review TI Design schematics.

0 Evan Su 2 months ago in reply to Prashanth Reddy

TI__Mastermind 18850 points

Hi Prashanth,

Drew is out of the office today and will get back to you tomorrow.

Best,

Evan Su

0 Prashanth Reddy 2 months ago

Prodigy 10 points

Hi Drew,

I have shared schematics over mail.

Boot strap config:

0 Drew Miller1 2 months ago in reply to Prashanth Reddy

TI__Mastermind 36123 points

Hi Prashanth,

Thanks for sharing the schematics, I didn't notice anything that I would expect to cause this.

A few thoughts:

Can you probe CLKOUT and confirm 25 MHz clock is observed?
Can you probe supplies and confirm stable 3.3V?

Thanks,

Drew

0 Prashanth Reddy 2 months ago

Prodigy 10 points

Hi Drew,

Issue is resolved. After changing PHY Address to 0x4 in the configuration.

Thank you for the support

0 Prashanth Reddy 2 months ago

Prodigy 10 points

Hi Drew,

According to Schematics PHY Address is configured as 0.

Can you cross check bootstrap design is proper.

0 Drew Miller1 2 months ago in reply to Prashanth Reddy

TI__Mastermind 36123 points

Hi Prashanth,

Thanks for the update.

Prashanth Reddy said:
Issue is resolved. After changing PHY Address to 0x4 in the configuration.

Is my understanding correct that you added 13k pullup to RX_DV/RX_CTRL pin?

It seems strange that address 0 was not working. Is there anything chance something else on RX_DV/RX_CTRL may have been slightly biasing the pin during pin strapping?

Thanks,

Drew

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DP83TC813R-Q1: DP83TC813R-Q1 Register 0x2 value read 0xFFFF via MDIO lines