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SN65HVS883: Maximum Readout Frequency of SN65HVS883

tiguest
Prodigy 40 points

Part Number: SN65HVS883

Tool/software:

Hi everyone,

I'm currently working with the SN65HVS883 digital serializer from Texas Instruments and I'm trying to determine its maximum readout frequency—i.e., how fast I can reliably read in all 8 channels over SPI.

I've gone through the datasheet, but I'm still unsure about the actual practical limits in terms of SPI clock speed and cycle time between reads. Has anyone tested or benchmarked the maximum achievable sampling rate for this IC in a real-world setup?

Any insights, scope captures, or timing diagrams would be greatly appreciated!

Thanks in advance

  • +1
    TI__Mastermind 24420 points

    Hi Simon,

    Looking into this there seems to be no internal benchmark or testing for the maximum readout frequency.( This i a older Ti device)

    However I do see in the datasheet that this device can support clock signals up to 100MHz(fclk spec in the datasheet)

    From my understanding in theory if you want to readout 8 bits from the serial output pin then the minimum amount out time that would take is 80ns

    Tread=8bits/100MHz=80ns   This is in theory but your spi clock might be slower than 100Mhz

    Not sure if this helps with the practical limits but just wanted to give a idea of what this device should be able to do in theory.

    From the reading i have done it seems there are many real world limiting factors that can slow down the maximum readout frequency in your spi design with this part including pcb design, temperature of devices in your design, and the how the a mcu or processor operates in the design.

    Please let me know if you have any additional questions and I can try to help

    Regards,

    Kameron