Tool/software:
hi team,
may you check the status of CSI-output behavior of 940 during lock=L? Customer find data lane (CSI0 D0+/D1+ stays high for ~50mS/120mV) while lock stays low which trigger the SOC enters fault state.
Is this expect behavior? CSI status is undefined if lock is L (940 finished initialization with CSI configured).
If so, how to configure CSI to defined status once LOCK drops?
Hi Dongbao,
Is that blip (where CSI = H) occuring upon power up or during the initialization of the 940? Can you share the script and full topology that is being used? Are they locally accessing the 940 or communicating through the SER?
Does this blip occur if they connect the SoC directly to the display?
Is there anything noticeable in the setup that could be driving current into the data pins? Can you probe the data pins and check if there is any jump in voltage or current?
You can disable the CSI lanes when they are not being used, and enable them after LOCK to see if that solves the problem.
BR,
Esther
